Hello instructor and peers, my name is Loren KarlSchwappach. I am a working towards my BSEE and BSCE at CTU.Today I am goi...
Today I am going to cover the following topics:   Transistor Transistor Logic (TTL)       Basic TTL NAND Circuit & Symbo...
This diagram uses two 2N3904 NPN transistors to emulatethe dual-emitter NPN transistor commonly used in TTL NAND gates. Ih...
I had to modify my original TTL circuit inputs into VDCsources in order to correctly simulate the currents and voltages wi...
After modifying both of the inputs to provide 0VDC (logic low)I observed the following results. First, the two logic lows ...
I next used the original TTL circuit with VPulse input sourceswith Input A’s frequency at 1kHz (period = 1ms) and Input B’...
I next checked the propagation delay and rise/fall times of thecircuit. The results were much better than I expected and s...
Today I talked to you about transistor transistor logic. Ishowed the most common TTL NAND gate, I tested a self engineered...
Does anyone have any questions?                                  9
References:Davis, L. (2011). Logic Threshold Voltage Levels. Retrieved August 16,2011, from: http://www.interfacebus.com/v...
References Continued:[Untitled NAND]. (n.d.). Retrieved August 16, 2011, from:http://www.kpsec.freeuk.com/symbols/nand.gif...
I had to modify my original TTL circuit inputs into VDCsources in order to correctly simulate the currents and voltages wi...
After modifying both of the inputs to provide 0VDC (logic low)I observed the following results. First, the two logic lows ...
If additional time permits:             You can add another stage to the simple TTL model called aTotem Pole Output Stage ...
TTL logic gates are in the 7400 and 5400 series. The 5400series is typically used for military technologies due to the tem...
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2a ee600 device_ttl_schwappach

  1. 1. Hello instructor and peers, my name is Loren KarlSchwappach. I am a working towards my BSEE and BSCE at CTU.Today I am going to speak to you about Transistor Transistor Logic NANDgates. To get the most from this briefing you will need to have anunderstanding of BJTs and basic electronics. 1
  2. 2. Today I am going to cover the following topics: Transistor Transistor Logic (TTL)  Basic TTL NAND Circuit & Symbol  PSpice Results for High Inputs  PSpice Results for Low Inputs  Simulation ResultsIf time permits I will also talk to you about: Totem Pole Output Stage & Fanout TTL Families 2
  3. 3. This diagram uses two 2N3904 NPN transistors to emulatethe dual-emitter NPN transistor commonly used in TTL NAND gates. Ihad to tie transistors Q1a’s and Q1b’s collectors and bases together tosimulate the two-emitter transistor commonly used in TTL gates. ResistorRB is called a pull resistor and is used to increase transistor Q3’sswitching speed. The symbols for representing NAND gates areillustrated. Some of the advantages and disadvantages of TTL (Davis,2011) include: CMOS is generally smaller and typically requires lessvoltage and uses less power than TTL. TTL typically benefits from fasterswitching speeds than CMOS. TTL uses bipolar transistors where CMOSuses MOSFET (metal oxide semiconductor field effect transistor). CMOSis more sensitive to ESD than TTL. 3
  4. 4. I had to modify my original TTL circuit inputs into VDCsources in order to correctly simulate the currents and voltages with bothinputs high. After running a PSpice simulation on the circuit I observedthe following results. First, the two logic highs (5VDC) resulted in a logiclow output (30.55mV) as should a NAND gate. Second, current flowedfrom R1 to the base and collector of Q1a and Q1b (working in reverseactive state), the current then proceeded through the base of Q2 and Q3,saturating both and sending the current to ground and resulting in a lowoutput. 4
  5. 5. After modifying both of the inputs to provide 0VDC (logic low)I observed the following results. First, the two logic lows resulted in alogic high (5VDC) output. The easiest path to ground was from VCCthrough resister R1, through the base of transistors Q1a and Q1b and thento the inputs. Little current flowed to the base of transistors Q2 and Q3 asa result, leaving both in cutoff mode and driving an output of 5VDC as aNAND gate should. 5
  6. 6. I next used the original TTL circuit with VPulse input sourceswith Input A’s frequency at 1kHz (period = 1ms) and Input B’s frequencyat 500Hz (period = 2ms). The results were pleasing and confirmed my TTLNAND gate circuit was correctly producing the results of a two inputNAND gate. 6
  7. 7. I next checked the propagation delay and rise/fall times of thecircuit. The results were much better than I expected and showedapproximately: a fall time of 4ns, a high to low propagation delay of 2ns, arise time between 50-100ns, and a low to high propagation delay of around25-50ns. These were in close agreement with TI’s (used to be NationalSemiconductor) DM7400 quad two input NAND gate. 7
  8. 8. Today I talked to you about transistor transistor logic. Ishowed the most common TTL NAND gate, I tested a self engineered TTLNAND circuit in PSpice against all possible inputs and confirmed the useof TTL for gate creation. If I had additional time I would also introducedthe Totem Pole Output Stage, Fanout, and some popular TTL families. 8
  9. 9. Does anyone have any questions? 9
  10. 10. References:Davis, L. (2011). Logic Threshold Voltage Levels. Retrieved August 16,2011, from: http://www.interfacebus.com/voltage_threshold.htmlDM7400 Specifications. (1989). National Semiconductor. Retrieved August16, 2011, from:http://www.datasheetcatalog.org/datasheet/nationalsemiconductor/DS006613.PDFFalstad, P. (2010). TTL NAND Gate Java Demonstration. RetrievedAugust 16, 2011, from: http://falstad.com/circuit/e-ttlnand.htmlNeamen, D. (2007). Microelectronics: Circuit Analysis and Design (3rd ed.).New York, NY: McGraw-Hill.Tokheim, R. (1988). Schaum’s Outline Series: Digital Principles (2nd ed.).New York, NY: McGraw-Hill.[Untitled SN7400]. (n.d.). Retrieved August 16, 2011, from:http://focus.ti.com/graphics/folders/partimages/SN7400.jpg 10
  11. 11. References Continued:[Untitled NAND]. (n.d.). Retrieved August 16, 2011, from:http://www.kpsec.freeuk.com/symbols/nand.gif[Untitled IEEE NAND]. (n.d.). Retrieved August 16, 2011, from:http://wiki-images.enotes.com/thumb/d/d8/NAND_IEC.svg/100px-NAND_IEC.svg.png[Untitled Question Mark]. (n.d.). Retrieved August 16, 2011, from:http://healmyptsd.com/wp-content/uploads/2009/09/question-mark3-misallphoto.jpg 11
  12. 12. I had to modify my original TTL circuit inputs into VDCsources in order to correctly simulate the currents and voltages with bothinputs high. After running a PSpice simulation on the circuit I observedthe following results. First, the two logic highs (5VDC) resulted in a logiclow output (30.55mV) as should a NAND gate. Second, current flowedfrom R1 to the base and collector of Q1a and Q1b (working in reverseactive state), the current then proceeded through the base of Q2 and Q3,saturating both and sending the current to ground and resulting in a lowoutput. 12
  13. 13. After modifying both of the inputs to provide 0VDC (logic low)I observed the following results. First, the two logic lows resulted in alogic high (5VDC) output. The easiest path to ground was from VCCthrough resister R1, through the base of transistors Q1a and Q1b and thento the inputs. Little current flowed to the base of transistors Q2 and Q3 asa result, leaving both in cutoff mode and driving an output of 5VDC as aNAND gate should. 13
  14. 14. If additional time permits: You can add another stage to the simple TTL model called aTotem Pole Output Stage by adding another transistor and diode belowresister RC and above transistor Q3. This is used in most TTL circuits toimprove propagation delay times (Neamen, 2007, p. 1278). Fanout is another important TTL circuit consideration. TheFanout number quantifies the maximum amount of similar logic circuitsthat can be connected to the output (Neamen, 2007, p. 1279). 14
  15. 15. TTL logic gates are in the 7400 and 5400 series. The 5400series is typically used for military technologies due to the temperaturehardiness. TTL families include standard, Low Power, Low PowerSchottky, Schottky, Advanced low-power Schottky, and AdvancedSchottky. The Low Power Schottky is the most commonly used TTL andthe Advanced Schottky has the fastest switching speed and works in theGHz range (Tokheim, 1988). 15

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