Post-processing SAR images on Xeon Phi – aporting exerciseMartin HilgemanHPC Consultant EMEA
Research Computing• Xeon Phi porting checklist• Post processing of SAR images• QuestionsAgendaDell Confidential
Research ComputingSAR interferometry is used to monitor terrain displacements by using satellite dataThe phase difference ...
Research ComputingApplication characteristics:– Written in C90 and C++, ~ 150,000 lines of code– Serial application, using...
Research ComputingTest SetupConfidential5Jobs ran at the TACC Stampede systemPowerEdge C8220 with Intel® Xeon® E5-2680 2.7...
Research ComputingParallelization of big main loopcount = 1;if (lastGCP != NULL) {app = lastGCP->next;} else {app = buffer...
Research ComputingDell ConfidentialResultsWall Clock Time (ss:00)Original version on E5440 2.83 GHz 102.00Original version...
Research Computing• Now runs multi-threaded using OpenMP directives– The number of patches is greater than the number of t...
Research ComputingModule Summary--------------------------------------------------------------------------------Samples Se...
Research ComputingDell ConfidentialQuestions?
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Post-processing SAR images on Xeon Phi - a porting exercise

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Dell's answer to post-processing SAR images using Xeon Phi Coprocessors

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Post-processing SAR images on Xeon Phi - a porting exercise

  1. 1. Post-processing SAR images on Xeon Phi – aporting exerciseMartin HilgemanHPC Consultant EMEA
  2. 2. Research Computing• Xeon Phi porting checklist• Post processing of SAR images• QuestionsAgendaDell Confidential
  3. 3. Research ComputingSAR interferometry is used to monitor terrain displacements by using satellite dataThe phase difference between two SAR images is calculated that have been acquired at:› different times› with slightly different view angles› different observation datesDell ConfidentialCase study: Geospatial imaging
  4. 4. Research ComputingApplication characteristics:– Written in C90 and C++, ~ 150,000 lines of code– Serial application, using Intel MKL DFTI functions– Iterative scheme• MKL FFTs are already being used, little room for improvement– FFTs are too small to run in threaded mode• Application only runs in serial mode, needs to be parallelized in order to run on a Phi inreasonable speed• Phase images are divided into patches, which is suitable for parallelization– Parallelize the main loop using OpenMPDell ConfidentialCode details
  5. 5. Research ComputingTest SetupConfidential5Jobs ran at the TACC Stampede systemPowerEdge C8220 with Intel® Xeon® E5-2680 2.7GHz– 16 cores– 32 GB memory– RHEL 6.3– Intel® Xeon Phi™ 7120P
  6. 6. Research ComputingParallelization of big main loopcount = 1;if (lastGCP != NULL) {app = lastGCP->next;} else {app = bufferGCP;}while (app) {app->loc [0] = (int) app->loc [0];app->loc [1] = (int) app->loc [1];app->offset[0] = (int) app->offset[0];app->offset[1] = (int) app->offset[1];<lot of work>lastGCP = app;app = app->next;count++;}6 Confidentialcount = 1;if (lastGCP != NULL) {app = lastGCP->next;} else {app = bufferGCP;}int i = 0;int nthreads, me;#if defined _OPENMP#pragma omp parallel private(i,me,app2,err,suboffset,qc,m_block,s_block){nthreads = omp_get_num_threads();me = omp_get_thread_num();#elsenthreads = 1;me = 0;#endif#pragma omp for schedule(static)for (i = 0; i < buffer_ngcp; i++) {#pragma omp critical{app2 = app;app = app->next;}app2->loc [0] = (int) app2->loc [0];app2->loc [1] = (int) app2->loc [1];app2->offset[0] = (int) app2->offset[0];app2->offset[1] = (int) app2->offset[1];<lot of work>lastGCP = app2;count++;}#if defined _OPENMP}#endif
  7. 7. Research ComputingDell ConfidentialResultsWall Clock Time (ss:00)Original version on E5440 2.83 GHz 102.00Original version on E5-2680 2.70 GHz 27.43Additional source optimizations 25.832 threads 17.374 threads 9.976 threads 7.178 threads 5.7712 threads 5.57
  8. 8. Research Computing• Now runs multi-threaded using OpenMP directives– The number of patches is greater than the number of threads on the Phi• Memory footprint is small, so should fit on the card– Running in native mode is possible• Intel MKL has complete support for Xeon Phi– Assume that the FFTs are making optimal use of the resourcesDell ConfidentialHow about Intel® Xeon Phi™ performance?
  9. 9. Research ComputingModule Summary--------------------------------------------------------------------------------Samples Self % Total % Module247 59.81% 59.81% /lib64/libc-2.12.so79 19.13% 78.93% /scratch/dell-guest/app38 9.20% 88.14% /opt/intel/mkl/lib/intel64/libmkl_core.so34 8.23% 96.37% /opt/intel/mkl/lib/intel64/libmkl_intel_thread.so10 2.42% 98.79% /opt/intel/mkl/lib/intel64/libmkl_intel_lp64.so5 1.21% 100.00% /lib64/ld-2.12.soFile Summary--------------------------------------------------------------------------------Samples Self % Total % File332 80.39% 80.39% ??64 15.50% 95.88% malloc.c10 2.42% 98.31% interp.c3 0.73% 99.03% bsearch.c2 0.48% 99.52% SRC/patch.c2 0.48% 100.00% printf_fp.cFunction Summary--------------------------------------------------------------------------------Samples Self % Total % Function126 30.51% 30.51% brk69 16.71% 47.22% ??60 14.53% 61.74% _int_malloc43 10.41% 72.15% pmatch34 8.23% 80.39% memcpy13 3.15% 83.54% get_correlation_real_mkl10 2.42% 85.96% extract2double8 1.94% 87.89% __intel_new_memcpyDell ConfidentialA profile
  10. 10. Research ComputingDell ConfidentialQuestions?

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