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Explore, design and implement threading parallelism with Intel® Advisor XE
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Explore, design and implement threading parallelism with Intel® Advisor XE

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Intel Advisor XE enables “Parallel Advisor” technology and methodology in HPC segment

Intel Advisor XE enables “Parallel Advisor” technology and methodology in HPC segment

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    Explore, design and implement threading parallelism with Intel® Advisor XE Explore, design and implement threading parallelism with Intel® Advisor XE Presentation Transcript

    • 1Explore, design and implementthreading parallelism with Intel® Advisor XEISC’ 2013June, 19 2013
    • 2Demo features• Intel® Advisor XE, part of Intel Cluster Stuio and Intel ParallelStudio, enables “Parallel Advisor” technology and methodologyin HPC segment.• We use it to model and implement effective parallelism for1)typical physicists’ and 2) typical FSI (financial) applications• Intel® Advisor Suitability helps to understand SMP scalabilitypotential and limitations for systems with hundreds of cores.Extended Suitability functionality provides user with uniqueinsight if given workload can make a best use of highly-parallelIntel Xeon Phi ™ coprocessor
    • 3Data Driven Threading DesignCopyright © 2012 Intel Corporation. All rights reserved. Intel, the Intel logo, Intel Sponsors of Tomorrow., and the Intel Sponsors of Tomorrow. logo are trademarks of Intel Corporation in the U.S. and other countries.Have you:• Tried threading an app, butseen little performancebenefit?• Hit a “scalability barrier”?Performance gains level offas you add cores?• Delayed a release that addsthreading because ofsynchronization errors?Breakthrough for threading design:• Quickly prototype multiple options• Project scaling on larger systems• Find synchronization errors beforeimplementing threading• Separate design andimplementation, design withoutdisrupting development1) Analyze it.3) Tune it.4) Check it.5) Do it!2) Design it.Add Parallelism with Less Effort, Less Risk and More Impact
    • 4Make a best use of multicore and manycore parallelism potential
    • 5Learn MoreCopyright © 2012 Intel Corporation. All rights reserved. Intel, the Intel logo, Intel Sponsors of Tomorrow., and the Intel Sponsors of Tomorrow. logo are trademarks of Intel Corporation in the U.S. and other countries.Intel® SoftwareDevelopment Toolssoftware.intel.comFree 30 Day Trials!Intel® Xeon® Processors &Intel® Xeon Phi™ Coprocessorswww.intel.com/hpcIntel® Cluster Readysoftware.intel.com/cluster-readyhttp://software.intel.com/mic-developerProgramming Resources – Forums, papers, trainings & labs
    • 6INFORMATION IN THIS DOCUMENT IS PROVIDED “AS IS”. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANYINTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMSANY EXPRESS OR IMPLIED WARRANTY, RELATING TO THIS INFORMATION INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESSFOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTYRIGHT.Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such asSYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of thosefactors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplatedpurchases, including the performance of that product when combined with other products.Copyright © , Intel Corporation. All rights reserved. Intel, the Intel logo, Xeon, Xeon Phi, Core, VTune, and Cilk are trademarks of Intel Corporation in theU.S. and other countries.Optimization NoticeIntel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intelmicroprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee theavailability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependentoptimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture arereserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specificinstruction sets covered by this notice.Notice revision #20110804Legal Disclaimer & Optimization NoticeCopyright© 2012, Intel Corporation. All rights reserved.*Other brands and names are the property of their respective owners.6
    • 7Thank you