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  1. 1. ISSN: 2278 – 1323 International Journal of Advanced Research in Computer Engineering & Technology Volume 1, Issue 4, June 2012 Enhancing the Slew rate and Gain Bandwidth of Single ended CMOS Operational Transconductance Amplifier using LCMFB Technique 1 Abhishek Singh, 2Sunil Kumar Shah, 3Pankaj Sahu 1 abhi16.2007@gmail.com, 2 sunil.ggits@gmail.com, 3 pankaj.sahu@yahoo.co.in Department of Electronics & Communication, Gyan Ganga Institute of Technology and Sciences, Jabalpur (M.P)Abstract • Its output of a current contrasts to that of standard operational amplifier whose output is aIndustry is continuously researching techniques to voltage.reduce power requirements, while increasingspeed, to meet the demands of today’s low • It is usually used "open-loop"; without(battery) powered wireless systems. The negative feedback in linear applications. This isoperational transconductance amplifier (OTA) is possible because the magnitude of the resistancea fundamental building block in analog (mixed- attached to its output controls its output voltage.signal) design and its performance characteristics Therefore a resistance can be chosen that keeps theare the foundation of system level characteristics. output from going into saturation, even with highImproving the performance of the fundamental differential input voltages.amplifier structure, while avoiding costly siliconarea and static power increases, is critical to Improving the performance of the fundamentalimproving system performance. The application amplifier structure, while avoiding costly silicon areaof Local Common Mode Feedback (LCMFB) to and static power increases, is critical to improvingthe conventional OTA structure provides system performance. The application of Localsignificant increases in gain-bandwidth and slew Common Mode Feedback (LCMFB) to therate performance without an increase in static conventional OTA structure provides significantpower and limited additional silicon area. In the increases in gain-bandwidth and slew ratepresented research, local common mode feedback performance without an increase in static power andtechnique has been applied to single ended limited additional silicon area. Both single ended anddifferential operational transconductance fully differential amplifier architectures are used inamplifiers. LCMFB provides wide-range industry for modern design.programming of amplifier characteristics andincreases the versatility of the amplifier structure. 2. Circuit principleKeywords: Slew rate, GBW, OTA, LCMFB As shown in Figure 2, the OTA employs a differential input pair and three current mirrors. The1. Introduction differential input pair is comprised of transistors M1, 2. The differential pair is biased by MB1, 2. MirrorsThe operational transconductance amplifier (OTA) is formed by M3, 5 and M4, 6 reflect currents generatedan amplifier whose differential input voltage in the differential pair to the output shell. The currentproduces an output current. Thus, it is a voltage generated by the mirror of M3, 5 is then reflected tocontrolled current source (VCCS). There is usually the output via the mirror formed by M7, 8. Thean additional input for a current to control the mirror gain factor, K, indicates the gain in mirrorsamplifiers transconductance. The principle formed by M3, 5 and M4, 6 with the followingdifferences from standard op-amp are- relations: β5=Kβ3, β6=Kβ4 where β=(KP/2)(W/L). Cascoding transistors M9, 10 are biased by Vcasn/Vcasp 450 All Rights Reserved © 2012 IJARCET
  2. 2. ISSN: 2278 – 1323 International Journal of Advanced Research in Computer Engineering & Technology Volume 1, Issue 4, June 2012and provide increased gain via increased (cascoded)output resistance. Figure.2.1 Proposed LCMFB OTA architecture Figure.2. Conventional OTA architecture 3. Circuit StructureThe conventional OTA is differentiated from other 3.1 Input Stage for main OTAamplifiers by the fact that its only high impedancenode is located at the output terminal. The The conventional OTA (Figure 3.1) uses aconventional OTA does not employ an output buffer differential pair in conjunction with three currentand is therefore, only capable of driving capacitive mirrors to convert an input voltage into an outputloads. The gain of the OTA (GmRo) is dependent on current. Common mode signals (Vi(+)=Vi(-)) are,the large output resistance of the shell (M5-M10) and ideally, rejected. For a common mode input voltage,is decreased to GmRo//RL≈GmL if a parallel resistive the currents are constant and will be: id1=id2=IBIAS/2,load R L is applied. Industry is researching techniques and iout=0. A differential input signal will generate anto reduce power requirements, while increasing output current proportional to the applied differentialspeed, to meet the demands of low (battery) powered voltage based on the transconductance of thewireless systems. These systems require amplifiers differential pair. Although the output stage is a push-with low bias currents, capable of producing large pull structure, the conventional OTA is only capabledynamic currents. Application of Local Common of producing an output current with a maximumMode Feedback (LCMFB) [1-3] techniques to the amplitude equal to the bias current in the output shellconventional OTA architecture produces an efficient (K*IBIAS,OS). For this reason, the conventional OTA isclass AB amplifier with enhanced gain-bandwidth a referenced as a class A structure capable ofand slew rate. An OTA structure, with local common producing maximum signal currents equal to that ofmode feedback, provided by R1, R2, is shown in the bias current applied. Slew rate (SR) is directlyFigure 2.1. proportional to the maximum output current and is defined as the maximum rate of change of the outputThe active load transistors M3,4 are reconnected to voltage. For a single stage amplifier, the slew rate ishave a common gate (node C) and matched resistors the output current divided by the total loadR1, R2 are used to connect the gate and drain capacitance. The conventional OTA therefore suffersterminals of M3, M4. Resistors R1, R2 can be the consequence that high speed requires large biasimplemented with PMOS transistors MR1, 2 currents which translates to large static poweroperating in the triode region. dissipation. Wireless and battery powered systems 451 All Rights Reserved © 2012 IJARCET
  3. 3. ISSN: 2278 – 1323 International Journal of Advanced Research in Computer Engineering & Technology Volume 1, Issue 4, June 2012require high slew rate and gain bandwidth values 3.2 Operation of Proposed Architecturewith low static power dissipation. These requirementsare difficult to achieve with class A structures such as For quiescent (or common mode) operation, the drainthe conventional OTA. The proposed class AB currents of transistors M1-M10 have equal valuesstructure with Local Common Mode Feedback (ID1-10=Ibias/2) while the current iR in transistors MR1,(LCMFB), can meet these requirements 2 is zero. The gate-source voltage of M3, 4 is the same as their drain-source voltage. For common mode signals, these transistors perform as low impedance (diode connected loads) with value: = _ (6) The SR and GBW are given as GBW = _ (7) The GBW is dependent on the programmable resistance RMR1, 2. As RMR1, 2 increases, the GB increases. Class AB operation provides large non- symmetric currents in the output shell. These currents are created by the large gate-source voltage swings (generated at nodes A/B) applied to M5, M6. Maximum output current generation occurs when the Figure 3.1 Conventional OTA open loop gain maximum gate-source differential is applied to M6 (or M5) and M5 (or M6) is in cutoff.The GBW and Slew Rate is given as,GBW = Kgm1, 2 / 2πCL _ (3) SR = = /CLAnd PStatic = (VDD- VSS) 3Ibias _ (9)SR = KIBias/ CL _ (4) Class AB operation in the LCMFB OTA produces signal currents much larger than the bias currentThe slew rate and GBW, therefore, increases linearly applied with the same static power dissipation as thatwith K. of the conventional structure (K=1). The advantageThe static power dissipation (PSTATIC) is the product of this operation is the capability to design high slewof the sum of the currents flowing through the current rate architectures with low static power dissipation.sources or sinks with the power supply voltages and 4. Design and Implementation Issuesis given by Table 4.1 Design specification and parametersPStatic = (VDD- VSS) IBias (2+K) _ (5) Parameter SpecificationAn increase in the mirror gain factor (K) will increasethe SR and GB of the conventional OTA at the cost Technology AMI 0.18 µm CMOSof increased area and static power dissipation and adecrease in phase margin. 452 All Rights Reserved © 2012 IJARCET
  4. 4. ISSN: 2278 – 1323 International Journal of Advanced Research in Computer Engineering & Technology Volume 1, Issue 4, June 2012Lambda 1λ= 0.6 µm M5 7.7/0.18 µm 0.28Threshold Voltages 0.42 volts, 0.41 volts M6=M7=M8 5.18/0.18 µm 0.23Transconductance 171µA/V2, 37µA/V2 M9=M10, (L MIN ) 1.098/0.18 µm 0.24Power Supply 1.8 V MB1 1.098/0.18 µm 0.23Bias Current 600 µA MB2 2.677/0.18 µm 0.23GBW 100MHzLoad Capacitance 10.0 pF 5. Simulation of circuit performances and implementation of circuit layout The operational transconductance amplifier isTable 4.2 Comparative Analysis designed with power voltage of 1.8V in 0.18um CMOS process. Figure 5.1 shows the layout of PARAMETERS SE- SE-PROPOSED operational transconductance amplifier and bias CONV circuit designed. Slew Rate (V/µs) 9.1 150 Bandwidth (MHz) 5.7 27 Maximum O/P Current 0.5 1.3 (mA)Static Power Dissipation 4.95 6.5 (mW) Gain Margin (dB) 25.2 35 Figure 5.1.1 Conventional OTA layout Phase Margin (Degree) 88.3 55Table 4.3 W/L ratio for Design issuesTRANSISTORS DIMENSIONS (W/L ) VDS, Sat (V)M1=M2 4.122/0.18 µm 0.25M3 1.912/0.18 µm 0.28M4 7.21/0.18 µm 0.28 Figure 5.1.2 Proposed OTA layout 453 All Rights Reserved © 2012 IJARCET
  5. 5. ISSN: 2278 – 1323 International Journal of Advanced Research in Computer Engineering & Technology Volume 1, Issue 4, June 2012The waveforms of Frequency response simulationand output setting time simulation are shown inFigures 5.2 and 5.3. Figure 5.2 Output Setting Time simulations 6. Conclusion In this study, a local common mode feedback technology has been adopted. As a result, the operational transconductance amplifier has greater slew rate and GBW as well as quick output signal setting time. References [1] Xin Lei, Dongbing Fu, Dongmei Zhu, and Chen Su, “A novel high-transconductance operational amplifier with fast setting time”, 978-1-4244-5798- 4/10/$26.00 ©2010 IEEE [2] Mai M. Kamel, Eman A. Soliman, Soliman A. Figure 5.3 Frequency Response simulations Mahmoud, “High Bandwidth Second Generation Current Conveyor based OperationalSilicon Area Dimensions for proposed Transconductance Amplifier”, 978-1-61284-857-architecture 0/11/$26.00 ©2011 IEEE [3] Sunil Kumar Shah, “Implementation of 8-bit 4 MSPS pipeline ADC”, National Conference on Innovations in Communication System and System Design (ICS2D-12), Gyan Ganga Institute of Technology and Sciences, Jabalpur, 2012 [4] Siddhartha, Gopal Krishna, Bahar Jalali- Farahani, “A Fast Settling Slew Rate Enhancement technique for Operational Amplifiers”, 978-1-4244- 7773-9/10/$26.00 ©2010 IEEE 454 All Rights Reserved © 2012 IJARCET
  6. 6. ISSN: 2278 – 1323 International Journal of Advanced Research in Computer Engineering & Technology Volume 1, Issue 4, June 2012[5] Antonio J. López-Martín, Sushmita Baswa, JaimeRamirez-Angulo, and Ramón González Carvajal,“Low-Voltage Super Class AB CMOS OTA CellsWith Very High Slew Rate and Power Efficiency”,IEEE JOURNAL OF SOLID-STATE CIRCUITS,VOL. 40, NO. 5, MAY 2005 About the Authors Abhishek Singh is currently pursuinghis M. Tech (final semester) in Embedded Systemand VLSI Design from GGITS, Jabalpur. He did hisBachelor of Engineering from GGITS, Jabalpur in2009 and his area of interest lies in Electronics andCommunication, Analog Communication and AnalogVLSI. Sunil Kumar Shah did his B. Tech fromThe Institution of Engineers (India) and M. Techfrom GGITS, Jabalpur in Embedded System andVLSI Design. Presently he is working as Professorand his area of specialization includes Electronicsand Communication and VLSI Design. Pankaj Sahu is currently pursuing his M.Tech (final semester) in Digital Communication fromGGCT, Jabalpur. He did his Bachelor of Engineeringfrom SRIT, Jabalpur and his area of interest lies inElectronics and Communication and AnalogCommunication. 455 All Rights Reserved © 2012 IJARCET