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# Logic Design - Chapter 2: Logic Gates

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• In OR gate if one of inputs is true the output will be true, and the output will be false if all the input is false.
• We notice that the output is false when all outputs are false.
• If any door or any window is opened the Alarm System will do.
• In AND gate if one of inputs is false the output will be false, and the output will be true if all the input is true.
• We notice that to make the output true, all the inputs must be true.
• If the driver is in the car which the Ignition is on and the seat belt is unbuckled the “SEAT BELT ALARM SYSTEM” will do.
• Not Gate we can get the complement of the input, for example if input == 0 the NOT operation is 1.    if input == A the not is the complement of A which = a’ .
• NOR operation is the complement of OR operation. If inputs is A , B OR operation is (A+B) but NOR operation is (A+B)’ .
In NOR operation the output is true when All inputs are false.
If one of inputs is true, then the output is false.
• NAND operation is the complement of AND operation. If inputs is A , B OR operation is (AB) but NOR operation is (AB)’ .
In NAND operation the output is false when All inputs are true.
If one of inputs is false, then the output is true.
• The exclusive NOR is the complement of The exclusive OR.
• ### Transcript

• 1. CHAPTER 2 Logic Gates
• 2. Contents          Boolean Variables & Truth Tables OR Operation AND Operation NOT Operation NOR Operation NAND Operation The Exclusive- OR Gate The Exclusive-NOR Gate INTEGRATED CIRCUIT LOGIC FAMILIES 2
• 3. Boolean Variables & Truth Tables LOGIC 0 False Off Low No Open Switch LOGIC 1 True On High Yes Close Switch 3
• 4. OR Operation 4
• 5. Timing Diagrams of OR gates 5
• 6. An application: Alarm System 6
• 7. AND Operation 7
• 8. Timing Diagrams of AND gates 8
• 9. An application: A Seat Belt Alarm System -1 -I 9
• 10. NOT Operation 10
• 11. NOR Operation 11
• 12. Negative AND equivalent of a NOR gate 12
• 13. An application: An aircraft landing indicator 13
• 14. NAND Operation 14
• 15. Negative OR Equivalent Operation of the NAND Gate 15
• 16. An application: A Manufacturing Plant Tank Indicator The sensors produce a 5 V level when the tanks are more than onequarter full. 16
• 17. The Exclusive- OR Gate Inputs A 0 0 1 1 output B 0 1 0 1 X 0 1 1 0 17
• 18. The Exclusive-NOR Gate Inputs • equivalence 0 coincidence X-NOR to A 0 0 1 1 output B 0 1 0 1 X 1 0 0 1 18
• 19. Timing diagram 19
• 20. INTEGRATED CIRCUIT LOGIC FAMILIES Diode Logic (DL)  Resistor-Transistor Logic (RTL)  Diode-Transistor Logic (DTL)  Transistor-Transistor Logic (TTL)  Emitter-Coupled Logic (ECL)  CMOS Logic  20
• 21. Fan-in & Fan-out  Fan-in   The number of standard loads drawn by an input to ensure reliable operation. Most inputs have a fan-in of 1. Fan-out  The number of standard loads that can be reliably driven by an output, without causing the output voltage to shift out of its legal range of values. 21
• 22. Comparison of performance characteristics of CMOS, TTL and ECL logic gates. Technology Device series Power dissipation: Static At 100 kHz Propagation delay time Fan-out CMOS (silicon gate) 74HC Std : standard Schottky TTL std TTL LS TTL S TTL ALS TTL AS ECL 74 74LS 74S 74ALS 74AS 10KH 1 uW 0.17 mW 8 ns CMOS (metal gate) 4000B 10 mW 10 mW 10 ns 10 2 mW 2 mW 10 ns 19 mW 19 mW 3 ns 1 mW 25 mW 25 mW 1 ns 20 20 20 8.5 mW 8.5 mW 1.5 ns 40 0.1 mW 50 ns LS: Low power Schottky ALS: Advanced Low power Schottky Schottky 1 mW 4 ns S: AS: Advanced 22