Technology Trend of Full Custom IC Design


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Technology Trend of Full Custom IC Design

  1. 1. Technology Trends of Full Custom IC Design Dr. David Sin, President and CTO, Sintek Semiconductor Limited Email: [email_address] Telephone: (852) 2491-6687
  2. 2. Silicon Technology Trends <ul><li>1) Digital CMOS Technology </li></ul><ul><li>The objectives of scaling digital CMOS is to enable smaller, faster, lower power, and lower cost logic circuits and microprocessors. </li></ul><ul><li>High-k gate insulators are desperately need to maintain higher gate currents. </li></ul><ul><li>Ultra-thin SOI can also enhance device designs. </li></ul><ul><li>Improvement in CMOS device designs will greatly increase gate current and device off current: will reach power crisis and make the power problem much worse. </li></ul><ul><li>2) System Memory </li></ul><ul><li>Full Custom Processor designers have been integrating increasing amounts of high-speed cache SRAM memory on processor chips to minimize cache-miss penalty and to reduce power dissipation associated with memory access. </li></ul><ul><li>Trend for improving system performance is to increase the amount of on chip high-speed embedded DRAM compatible with a high-performance logic process to reduce power dissipation. </li></ul><ul><li>Alternatively, embedded DRAM technology compatible with a high-performance logic process can be used to design stand-alone or embedded high-density 1T SRAM to improve system performance and power dissipation. </li></ul>
  3. 3. Silicon Technology Trends <ul><li>3) High-Density but Low-Power Memory </li></ul><ul><li>Future Wireless personal systems usually employ over 10MB of embedded SRAM memory instead of embedded DRAM memory due to the super low power dissipation requirement for hand-held electronics systems </li></ul><ul><li>Solution is to develop smaller one transistor SRAM cell which is significantly smaller than conventional six-transistor cell. </li></ul><ul><li>4) ) High-Density NV Memory for Data Storage </li></ul><ul><li>For system NV memory is used for data storage to replace magnetic storage. </li></ul><ul><li>For applications where embedded NV memory is required for the lowest power option. </li></ul><ul><li>One trend is that designer put more and more features on system without disk storage. Hence, the amount of NV memory needed for storage will grow rapidly to over 8GB in the future soon. </li></ul><ul><li>Embedded NAND Flash is an ideal non-volatile memory for hand-held personal electronics systems. </li></ul><ul><li>Stand-alone NAND Flash with 4GB, 8GB and 16GB will be available in the future. </li></ul><ul><li>Embedded MDRAM is another ideal non-volatile memory for hand-held personal electronics systems. </li></ul>
  4. 4. Silicon Technology Trends <ul><li>Very large size of embedded Mask ROM is used to replace very large size NAND Flash memory and to reduce the cost for mature software application. </li></ul><ul><li>Very large size of embedded Mask ROM like 128Mb/ 256Mb will be used for developing lowest-cost with highest performance hand-held electronics systems with very large size of fixed data. </li></ul><ul><li>Solution is to integrate Salicide Digital CMOS technology with Flat-Cell Mask ROM technology for large size embedded Mask ROM. </li></ul><ul><li>5) Mixed-Signal Technology </li></ul><ul><li>RF and analog are backbone technologies for building wireless communication integrated circuits. </li></ul><ul><li>BiCMOS is the right technology for designing mixed-signal system, CMOS logic for digital functions and bipolar devices for RF and analog functions. </li></ul><ul><li>To isolate the noise generated in the digital part from the RF and analog parts, SOI BiCMOS technology will be the future technology for mixed-Signal technology for RF and analog parts. </li></ul><ul><li>This will make complementary BiCMOS, with npn, pnp and CMOS all on the same chip. </li></ul>
  5. 5. Silicon Technology Trends <ul><li>6) System-on-Chip Integration </li></ul><ul><li>SoC integration is certainly one direction for improving system performance and reducing system power dissipation. </li></ul><ul><li>SoC will be very attractive as a technology trend for meeting system needs. </li></ul><ul><li>Hower, designers often find SoC integration not the lowest-cost solution sometimes. In-Package integration may be able to offer a lower-cost solution to connect processor and memory chips then the embedded memory on SoC case. </li></ul><ul><li>Embedded memory in SoC can offer higher performance and lower power dissipation because data transfer on chip is much faster than off chip case. </li></ul><ul><li>7) SiPs Step Into the Mainstream </li></ul><ul><li>Multi-chip package (MCP) are increasingly being used in small, portable consumer and computing systems, such as cell phones and PDAs, to enable the lower power, smaller form factors, and lower cost than system designers seek when developing these medium-to high-volume products. </li></ul><ul><li>In the future SiP are used instead of pricier SoC for RF components, as well as for combining processors, logic and memory in a single package. </li></ul><ul><li>For the purposes of reducing power consumption, cost and size, the needs to increase silicon density and gain higher reliability have combined to use MCP for many applications consist of DRAM, SRAM, NAND Flash, ROM and RF components, etc. </li></ul>
  6. 6. DRAM Design Trends <ul><li>Stand-alone </li></ul><ul><li>A DRAM manufacturer is working on to using 3D Si thru-hole electrodes to slash the mounting footprint of 1-Gbit chip by using eight 128-Mbit chip in a stack in fiscal 2006 for use in mobile phones. </li></ul><ul><li>Embedded </li></ul><ul><li>Embedded DRAM is being used to make, </li></ul><ul><li>144Mb Cache DRAM LSI, MPEG-4 Audiovisual LSI, NTSC/PAL Imaging Processor, etc. </li></ul>
  7. 7. SRAM Design Trends <ul><li>Stand-alone </li></ul><ul><li>1M/2M/4M/16M SRAMs are produced with 6T SRAM technology. Starting with 32M SRAM, 1T SRAM technology is being used. </li></ul><ul><li>256M/128M 1T SRAM is being developed by major SRAM companies, like Monolithic System Technology (MoSys), Samsung Electronics, Cypress Semiconductor, etc. </li></ul><ul><li>Embedded </li></ul><ul><li>Smaller size embedded SRAM use 6T cell </li></ul><ul><li>Larger size embedded SRAM use 1T Macro from MoSys </li></ul>
  8. 8. NAND Flash Design Trends <ul><li>Samsung Electronics is developing 4GB and 8GB NAND Flash Memories for </li></ul><ul><li>cell phone, smart phone, PDA, digital camera and MP3, etc. </li></ul><ul><li>In the future16GB and 32GB NAND flash memories with stacking technology will replace small Harddisk Drive soon . </li></ul>
  9. 9. ROM Design Trends <ul><li>Stand-alone </li></ul><ul><li>512M/256M mask ROMs are already available with 0.18um technology. 1G mask ROM will be developed with 0.13um soon. </li></ul><ul><li>Embedded </li></ul><ul><li>There is no larger size embedded mask ROM CMOS process for low cost SoC design. </li></ul><ul><li>For the size of embedded 128M and 256M mask ROMs, Flat-Cell mask ROM technology will be integrated with standard logic CMOS technology. </li></ul>
  10. 10. Custom Processor Design Trends <ul><li>Semiconductor firms are already actively using custom processor core in SoC design to handle audio and video tasks in digital home appliances. It offers more flexibility with design revision. </li></ul><ul><li>NEC Electronics uses six to nine custom processor cores for use in mobile phones. </li></ul><ul><li>The Toshiba Media embedded Processor (MeP) offers to design digital TV successfully. Toshiba offers MeP as an IP core for SoC design for outside customers. </li></ul><ul><li>The customizable processor core from ARC International is being used in about 150 products worldwide. </li></ul>
  11. 11. Video Design Trends <ul><li>H.264 to Displace MPEG2 and MPEG4 in Video Compression. </li></ul><ul><li>The data compression ratio of H.264 is 2 to 3 times higher than the MPEG-2 used in current DVD systems, and 1.5 to 2 times higher than MPEG-4. </li></ul><ul><li>Full custom IC designers will rush to design this H.264 and MPEG-4 </li></ul><ul><li>Codec IC for the consumer video application markets. </li></ul>
  12. 12. Wireless/DSP Design Trends <ul><li>The number of dual handsets, supporting both Global System for Mobile Communication/General Packet Radio Service (GSM/GPRS) and wideband code division multiple access (W-CDMA) is expected to soar very soon. This will drive the full custom IC designers to integrate the transceiver and baseband circuits using the same CMOS technology with high-Q inductors and MIM capacitors, first for the GSM/GPRS single chip. As the next step, the designers are considering integrating the W-CDMA chip and the GSM/GPRS chip into a single IC. </li></ul>