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A PRAM and NAND Flash Hybrid Architecture for High-Performance Embedded Storage Subsystems Jin Kyu Kim, Samsung Electronic...
Why Hybrid Approach ?  ≤ <ul><li>Gasoline Engine </li></ul><ul><li>- Gasoline price is high  </li></ul><ul><li>- Pollution...
Era of Hybrid Approach <ul><li>NAND Flash </li></ul><ul><li>[-] Short life span  </li></ul><ul><li>[-] W Performance depen...
Characteristics of NVRAM(PRAM) <ul><li>Flash memory device </li></ul><ul><ul><li>Erase before program </li></ul></ul><ul><...
Memory Components
Overall Storage Hierarchy Performance Problems ! <ul><ul><li>User data (Clusters) </li></ul></ul><ul><ul><li>Large size da...
Motivations <ul><li>In Filesystem Level </li></ul><ul><li>In addition to user data, file system needs to manage meta data ...
Motivations <ul><li>In Filesystem Level </li></ul><ul><li>In addition to user data, file system needs to manage meta data ...
Overall Scheme – FSMS, hFTL
Approach in File System Level FSMS (File System Metadata Separation)
File System Metadata Separation Scheme <ul><li>Separate File System Meta data [FAT,DIR,Log] from NAND Flash </li></ul><ul>...
Approach in Block Device Level  hFTL (PRAM+NAND hybrid storage FTL)
Need for hFTL
Implementation of hybrid FTL
Implementation of hybrid FTL <ul><li>PRAM, NAND Layout </li></ul>
Performance Optimizations - 1 <ul><li>Filtering between FS and PRAM device </li></ul><ul><li>On the average, only 16 % of ...
Performance Optimizations-2 <ul><li>Functionality of Logical Delete </li></ul>Remove management  Overhead of the space  oc...
Evaluations <ul><li>Evaluation Setting </li></ul><ul><ul><li>S3C2413 CPU board </li></ul></ul><ul><ul><ul><li>1 Channel, 1...
LLD, FTL-Level Evaluation <ul><li>LLD (Low Level Device driver) </li></ul><ul><ul><li>Read: 4.25MB/s, Write 1.7MB/s </li><...
File System Level Evaluations <ul><li>IOzone benchmark for Sequential I/O </li></ul>
File System Level Evaluations <ul><li>IOzone benchmark for Random I/O </li></ul>
Life Span and Implementation Cost <ul><li>Life Span </li></ul><ul><li>Implementation Cost </li></ul>Required PRAM for 1GB ...
Contribution <ul><li>Summary </li></ul><ul><ul><li>Suggest SW scheme for efficient usage of NAND/PRAM Hybrid Storage </li>...
NAND v.s. PRAM In current technology, it’s hard to replace NAND flash  with PRAM device. However, it’s enough to replace N...
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  • 1. 전체적으로 대 / 소 문자 통일
  • 내려오는 flow 를 animation 으로 날리고 , text 역시 animation 으로 가장 나중에 등장하도록
  • F 는 의 한계점 하고 , Applicaion 의 random 으로 인한것 만 고려 두개만 남기고 .. 둘은 날릴것 .
  • 실제 호환성을 위해 block device interface 를 유지 해야 하기 때문에 , 블록 단위 meta
  • 보드 언급은 하지 말고 ~~ ^^ 32, 16KB 가 가장 많이 사용하는 buffer size 라는 것을 표기 하는 animation 및 박스 표기 추가 하고 , 평균 성능 향상 percent 표기
  • 박스 집어 넣어서 .. 강조 하고 . 시간에 따라 시간이 부족 할 경우 ,  간략하게 이유만 설명 하는 방향으로
  • PRAM 영역은 NOR 대체 기 때문에 , Code 저장하고 , 남은 공간을 사용하기 때문에 .. 공짜다 .. 강조 System 구현 cost 는 늘지 않는다 . ^^
  • Biz Impact 에 대한 언급 … Summary 후에 . FeRAM 은 언급 빼고 .. Future work 외에 business impact 에 대한 언급을 더 하자 .
  • 예상 질문 리스트 만들고 .. 참고 appendix ppt 준비 할 것 . 이철 책임님 : PRAM 관리 코드 overhead  답 FSMS
  • Transcript of "slide"

    1. 1. A PRAM and NAND Flash Hybrid Architecture for High-Performance Embedded Storage Subsystems Jin Kyu Kim, Samsung Electronics Hyung Gyu Lee, Samsung Electronics Shinho Choi, Samsung Electronics Kyoung Il Bahng, Samsung Electronics
    2. 2. Why Hybrid Approach ? ≤ <ul><li>Gasoline Engine </li></ul><ul><li>- Gasoline price is high </li></ul><ul><li>- Pollution </li></ul><ul><li>- Fuel Efficiency depends on traffic </li></ul><ul><ul><li>[+]Good for high way </li></ul></ul><ul><ul><li>[-]Bad for heavy traffic </li></ul></ul><ul><li>[+] Fuel capacity is large </li></ul>Electronic Motor [+] Electricity price is reasonable [+] No pollution [+] Good fuel efficiency [-] Fuel capacity is very limited
    3. 3. Era of Hybrid Approach <ul><li>NAND Flash </li></ul><ul><li>[-] Short life span </li></ul><ul><li>[-] W Performance depends on access </li></ul><ul><ul><li>[+]Good for large sequential access </li></ul></ul><ul><ul><li>[-]Bad for small random access </li></ul></ul><ul><li>[-] No support for byte access </li></ul><ul><li>[+] Very high density </li></ul>NVRAM [+] Long life span [+] Good performance [+] Support for byte access [-] Low density NAND Flash NVRAM User Data Meta Data
    4. 4. Characteristics of NVRAM(PRAM) <ul><li>Flash memory device </li></ul><ul><ul><li>Erase before program </li></ul></ul><ul><ul><li>Different granularity on erase and program operations </li></ul></ul><ul><ul><li>Limited life time </li></ul></ul><ul><ul><li>High Density (NAND) </li></ul></ul><ul><li>NVRAM </li></ul><ul><ul><li>Fast read/write </li></ul></ul><ul><ul><li>Byte operation (random access) </li></ul></ul><ul><ul><li>No erase operation </li></ul></ul><ul><ul><li>Capacity (cost) problem </li></ul></ul>
    5. 5. Memory Components
    6. 6. Overall Storage Hierarchy Performance Problems ! <ul><ul><li>User data (Clusters) </li></ul></ul><ul><ul><li>Large size data </li></ul></ul><ul><ul><li>Sequential access pattern </li></ul></ul><ul><ul><li>SectorUnit I/O ⇒ Appropriate for NAND property </li></ul></ul><ul><ul><li>Meta data (Clusters) </li></ul></ul><ul><ul><li>Small Size Data </li></ul></ul><ul><ul><li>Frequently updated </li></ul></ul><ul><ul><ul><li>⇒ Appropriate for PRAM property </li></ul></ul></ul><ul><ul><li>Mixed Pattern  Random Pattern </li></ul></ul><ul><ul><li>Main reason for FTL performance degradation </li></ul></ul><ul><ul><li>Performance degradation for overall storage </li></ul></ul>
    7. 7. Motivations <ul><li>In Filesystem Level </li></ul><ul><li>In addition to user data, file system needs to manage meta data </li></ul><ul><li>The properties of meta data degrade FTL performance </li></ul><ul><ul><li>degrade the throughput of file system </li></ul></ul><ul><li>If store FS metadata into NVRAM instead of NAND </li></ul><ul><li>Decrease overhead for handling Metadata I/O </li></ul><ul><li>Decrease random access I/O to FTL </li></ul>Motivation 1 <ul><li>In FTL Level </li></ul><ul><li>Performance and Performance stability depends on the mapping algorithm </li></ul><ul><li>FTL performance depends on user(Filesystem) 의 Access Pattern </li></ul>Page Mapping - High performance - High resource consumption Block Mapping - Low performance - Low resource consumption Mapping granularity Fine granularity Coarse granularity High performance Low performance Degree of random access Low High If implement FTL with NVRAM  Page Mapping without large amount of memory memory  Stable against random access through fine granularity Motivation 2
    8. 8. Motivations <ul><li>In Filesystem Level </li></ul><ul><li>In addition to user data, file system needs to manage meta data </li></ul><ul><li>The properties of meta data degrade FTL performance </li></ul><ul><ul><li>degrade the throughput of file system </li></ul></ul><ul><li>If store FS metadata into NVRAM instead of NAND </li></ul><ul><li>Decrease overhead for handling Metadata I/O </li></ul><ul><li>Decrease random access I/O to FTL </li></ul>Motivation 1 <ul><li>In FTL Level </li></ul><ul><li>Performance and Performance stability depends on the mapping algorithm </li></ul>Motivation 2 Coarse grained mapping FTL Fine grained mapping FTL Fine grained mapping FTL with NVRAM Resource Performance
    9. 9. Overall Scheme – FSMS, hFTL
    10. 10. Approach in File System Level FSMS (File System Metadata Separation)
    11. 11. File System Metadata Separation Scheme <ul><li>Separate File System Meta data [FAT,DIR,Log] from NAND Flash </li></ul><ul><ul><li>Store FS Metadata on PRAM  Decrease random access to FTL </li></ul></ul><ul><ul><li>Only the user data will be stored on NAND flash </li></ul></ul><ul><ul><li>Random Access decrement -> FTL overhead decrease -> Performance and life span of NAND flash increase </li></ul></ul>
    12. 12. Approach in Block Device Level hFTL (PRAM+NAND hybrid storage FTL)
    13. 13. Need for hFTL
    14. 14. Implementation of hybrid FTL
    15. 15. Implementation of hybrid FTL <ul><li>PRAM, NAND Layout </li></ul>
    16. 16. Performance Optimizations - 1 <ul><li>Filtering between FS and PRAM device </li></ul><ul><li>On the average, only 16 % of one metadata block is changed </li></ul>
    17. 17. Performance Optimizations-2 <ul><li>Functionality of Logical Delete </li></ul>Remove management Overhead of the space occupied by deleted file
    18. 18. Evaluations <ul><li>Evaluation Setting </li></ul><ul><ul><li>S3C2413 CPU board </li></ul></ul><ul><ul><ul><li>1 Channel, 1 NAND device support </li></ul></ul></ul><ul><ul><ul><li>(MLC and SLC) </li></ul></ul></ul><ul><ul><li>64MB PRAM (KPS1215EZM) </li></ul></ul><ul><ul><li>1GB MLC NAND (K9G8G08U0M) </li></ul></ul><ul><li>Evaluations </li></ul><ul><ul><li>Comparison Target: log block FTL </li></ul></ul><ul><ul><li>Criterion </li></ul></ul><ul><ul><ul><li>Performance </li></ul></ul></ul><ul><ul><ul><ul><li>LLD Layer (Low Level Device driver) </li></ul></ul></ul></ul><ul><ul><ul><ul><li>FTL Layer (Block Device driver) </li></ul></ul></ul></ul><ul><ul><ul><ul><li>File system Layer (TFS4) </li></ul></ul></ul></ul><ul><ul><ul><li>Life span: Erase count </li></ul></ul></ul><ul><ul><ul><li>Cost : code and data size </li></ul></ul></ul>PRAM NAND
    19. 19. LLD, FTL-Level Evaluation <ul><li>LLD (Low Level Device driver) </li></ul><ul><ul><li>Read: 4.25MB/s, Write 1.7MB/s </li></ul></ul><ul><li>FTL </li></ul><ul><ul><li>Sequential Read: 4.16MB/s (LB-FTL, hFTL Similar) </li></ul></ul><ul><ul><li>Random Read: 4.09MB/s (LB-FTL, hFTL Similar) </li></ul></ul><ul><ul><li>Sequential Write: 1.62MB/s (LB-FTL, hFTL Similar) </li></ul></ul><ul><ul><li>Random Write : </li></ul></ul>
    20. 20. File System Level Evaluations <ul><li>IOzone benchmark for Sequential I/O </li></ul>
    21. 21. File System Level Evaluations <ul><li>IOzone benchmark for Random I/O </li></ul>
    22. 22. Life Span and Implementation Cost <ul><li>Life Span </li></ul><ul><li>Implementation Cost </li></ul>Required PRAM for 1GB NAND: For FSMS : 2 MB For hFTL : 2.5 MB
    23. 23. Contribution <ul><li>Summary </li></ul><ul><ul><li>Suggest SW scheme for efficient usage of NAND/PRAM Hybrid Storage </li></ul></ul><ul><ul><ul><li>FSMS </li></ul></ul></ul><ul><ul><ul><li>hFTL </li></ul></ul></ul><ul><ul><li>Enhance the performance compared to NAND only storage </li></ul></ul><ul><ul><ul><li>FSMS, hFTL take effects orthogonally </li></ul></ul></ul><ul><ul><ul><li>For, sequential write, the effects of FSMS is larger than that of hFTL </li></ul></ul></ul><ul><ul><ul><li>For, random write, the effects of hFTL is larger than that of F 는 </li></ul></ul></ul><ul><ul><ul><li>hFTL+FSMS shows better performance than LBFTL by up to 290%. </li></ul></ul></ul><ul><ul><ul><li>hFTL shows better performance than LBFTL+FSMS. </li></ul></ul></ul><ul><li>Future work </li></ul><ul><ul><li>Aggressive optimization using NGNVMs in File System Level </li></ul></ul><ul><ul><li>Scalability for large NAND flash storage </li></ul></ul>
    24. 24. NAND v.s. PRAM In current technology, it’s hard to replace NAND flash with PRAM device. However, it’s enough to replace NOR flash Page Access Need for Erase 10 4 1.4ms 800us(page) 60us(page) Serial access:30ns NAND(MLC) 1.4ms N/A Block Erase Time 200us(page) 10us (word) Word Program Time Page Access Need for Erase Byte Access No need for Erase Features 10 5 10 6 Life span 20us(page) Serial access:25ns Async: 80ns Sync: 10ns Access time NAND(SLC) PRAM Features
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