Reduce Manufacturing Costs with
Numonyx™ Flash Memory Enhanced
Factory Programming
Application Note 738

October 2000




...
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL...
Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming




Contents

1.0   Introduction ........
Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming




Revision History


      Date     ...
Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming




1.0            Introduction
      ...
Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming




                   Following each ...
Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming




Figure 1:        Enhanced factory ...
Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming




3.1                EFP requirement...
Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming




Table 1:     Example of the EFP se...
Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming




3.5                Program data-st...
Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming




4.0            What environments d...
Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming




6.0                Considerations ...
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  1. 1. Reduce Manufacturing Costs with Numonyx™ Flash Memory Enhanced Factory Programming Application Note 738 October 2000 292286-02
  2. 2. INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Numonyx B.V. may make changes to specifications and product descriptions at any time, without notice. Numonyx B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting the Numonyx website at http://www.numonyx.com. Numonyx, the Numonyx logo, and StrataFlash are trademarks or registered trademarks of Numonyx B.V. or its subsidiaries in other countries. *Other names and brands may be claimed as the property of others. Copyright © 2008, Numonyx, B.V., All Rights Reserved. Application Note March 2008 2 292286-02
  3. 3. Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming Contents 1.0 Introduction .............................................................................................................. 5 2.0 What is EFP?.............................................................................................................. 5 3.0 How does EFP function? ............................................................................................ 5 3.1 EFP requirements ................................................................................................ 8 3.2 EFP considerations............................................................................................... 8 3.3 EFP setup command ............................................................................................ 8 3.4 Program data-stream operation............................................................................. 8 3.5 Program data-stream termination........................................................................ 10 3.6 Verify data-stream operation .............................................................................. 10 3.7 Verify data-stream termination ........................................................................... 10 3.8 EFP exit ........................................................................................................... 10 4.0 What environments does EFP improve program and verify times? ........................... 11 5.0 Benchmark data: comparing EFP to conventional programming on device programmers11 6.0 Considerations for the device programmer environment ......................................... 12 7.0 Summary ................................................................................................................. 12 March 2008 Application Note 292286-02 3
  4. 4. Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming Revision History Date Revision Description Aug 2000 01 Initial release March 2008 02 Applied Numonyx branding. Application Note March 2008 4 292286-02
  5. 5. Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming 1.0 Introduction As flash memory densities increase, manufacturing engineers seek new methods to quickly program and verify the memories. Numonyx developed a new flash memory programming algorithm, Enhanced Factory Programming (EFP), that improves program and verify times 30 percent to 80 percent or more over conventional programming methods. Using EFP, manufacturing engineers program Numonyx flash memories faster than any other NOR flash memory. This results in faster assembly-line beat-rates, lower production costs and more products per hour from production lines. This application note explores EFP benefits, limitations, technical concepts and shares empirical data comparing EFP on various programming systems. 2.0 What is EFP? EFP is a factory programming method used to quickly program and verify Numonyx flash memories. This new method is optimized specifically for manufacturing programming operations. EFP uses a 30h command to configure the flash memory for manufacturing programming. The conventional programming method, using a 40h command, still exists in the flash memory and can still be used for programming. Numonyx added EFP technology to flash memories to optimize programming operations for the manufacturing environment. Because manufacturing environments are strictly controlled, meaning ambient temperatures do not fluctuate, voltages remain constant, read and write cycles are limited, high programming voltages are available, we can optimize the internal programming operations in the flash memory. By optimizing these operations, we obtain faster programming speeds. In addition to optimizing internal program and verify operations, there exist operations that consume system overhead in device programmers, automatic test-equipment, memory testers, JTAG programmers, and in-system writes, etc. These operations also are optimized with EFP. Certain functions, such as incrementing addresses for each memory location, consume much time in these types of systems. EFP allows the flash memory to internally increment addresses after programming or verifying each memory location. Internally incrementing addresses within the flash memory relieves the programming equipment of this responsibility, resulting in reduced system overhead. This allows quicker program and verify times. 3.0 How does EFP function? EFP substantially reduces device programming times through a combination of flash memory Write State Machine (WSM) changes. Some WSM changes are: • Elimination of internal voltage switching between programming levels and verify levels at each memory-array location. • Elimination of system overhead associated with writing each memory location address to the flash memory. This is accomplished by using an internal address counter to sequence through the memory locations for program and verify operations. During the programming operation, a single attempt is made to program the flash cell at each memory location. This substantially reduces the time it takes to program a memory location. Program verification occurs in a separate phase of the EFP operation. This change eliminates the internal delays required to switch voltages on the programmed cells from programming levels to verification levels, and back and forth if additional program attempts are necessary. If a memory cell requires an additional attempt to program successfully, it occurs during the verification phase. March 2008 Application Note Order Number: 292286-02 5
  6. 6. Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming Following each internal program attempt, the device automatically increments its address to the next sequential location. Device programming equipment and other manufacturing programming techniques can sequentially program data throughout an entire block by setting up and delivering an address to the flash memory only once. Manufacturing programming equipment need only stream data to the device in the EFP verify phase. This equipment can rely on the margined verification that occurs within the device, instead of consuming time to perform the data compare external to the flash memory. This saves much time in the verify phase. Programming equipment need only perform a single full-status check at the completion of block programming to ensure that the device has stored the data correctly. See Figure 1, “Enhanced factory programming procedure” on page 7 for a detailed flow diagram of EFP. Application Note March 2008 6 Order Number: 292286-02
  7. 7. Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming Figure 1: Enhanced factory programming procedure EFP Setup EFP Program EFP Verify EFP Exit Read Read Read Start Status Register Status Register Status Register VPP = 12V Unlock Block SR.0=1=N Data Stream SR.0=1=N Verify Stream SR.7=0=N EFP Ready? Ready? Exited? SR.0 = 0 = Y SR.0 = 0 = Y SR.7 = 1 = Y Write 30h Address = WA0 Write Data Write Data Full Status Check Address = WA0 Address = WA0 Procedure Write D0h Address = WA0 Read Read Operation Status Register Status Register Complete SR.0=1=N SR.0=1=N EFP setup time (see datasheet) Program Verify Done? Done? Read Status Register SR.0 = 0 = Y SR.0 = 0 = Y SR.7=0=Y N Last N Last EFP Setup Data? Data? Done? SR.7 = 1 = N Y Y Check VPP & Lock Write FFFFh Write FFFFh errors (SR.3, SR.1) Address ≠ BBA Address ≠ BBA Exit EFP Setup EFP Program EFP Verify Bus Bus Bus Comments Comments Comments State State State Unlock VPP = 12V Read Status Register Read Status Register Write Block Unlock block Data Check SR.0 Verify Check SR.0 EFP Data = 30h Standby Stream 0 = Ready for data Standby Stream 0 = Ready for verify Write Ready? 1 = Not ready for data Ready? 1 = Not ready for verify Setup Address = WA0 EFP Data = D0h Write Data = Data to program Write Data = Word to verify Write Confirm Address = WA0 (note 1) Address = WA0 (note 2) Address = WA0 EFP setup time Read Status Register Read Status Register Standby (see datasheet) Check SR.0 Check SR.0 Program Standby Verify Read Status Register Standby 0 = Program done 0 = Verify done Done? (note 3) Done? EFP Check SR.7 1 = Program not done 1 = Verify not done Standby Setup 0 = EFP ready Last Device automatically Last Device automatically Done? 1 = EFP not ready Standby Standby Data? increments address. Data? increments address. If SR.7 = 1: Error Exit Data = FFFFh Exit Data = FFFFh Check SR.3, SR.1 Standby Condition Write Program Address not within same Write Verify Address not within same SR.3 = 1 = VPP error Check Phase BBA Phase BBA SR.1 = 1 = locked block 1. WA0 = first Word Address to be programmed within the target block. The BBA (Block Base EFP Exit Address) must remain constant throughout the program phase data stream; WA can be held Read Status Register constant at the first address location, or it can be written to sequence up through the addresses Check SR.7 within the block. Writing to a BBA not equal to that of the block currently being written to EFP Standby 0 = Exit not finished terminates the EFP program phase, and instructs the device to enter the EFP verify phase. Exited? 1 = Exit completed 2. For proper verification to occur, the verify data stream must be presented to the device in the same sequence as that of the program phase data stream. Writing to a BBA not equal to WA Repeat for subsequent operations. terminates the EFP verify phase, and instructs the device to exit EFP. After EFP exit, a Full Status Check can 3. Bits that did not fully program with the single WSM pulse of the EFP program phase receive determine if any program error occurred. additional program-pulse attempts during the EFP verify phase. The device will report any See the Full Status Check procedure in the program failure by setting SR.4=1; this check can be performed during the full status check after Word Program flowchart. EFP has been exited for that block, and will indicate any error within the entire data stream. March 2008 Application Note Order Number: 292286-02 7
  8. 8. Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming 3.1 EFP requirements • Ambient temperature: TA = 25° C, ± 5° C • VCC: within device VCC operating range • VPP: within device 12V range • The target block must be unlocked before issuing the EFP Setup and Confirm commands • Cycling below 10 erase cycles per block 3.2 EFP considerations • Read-while-write (code-execution reads or data reads from another partition) is not supported during EFP • Each EFP operation will program one block. To program another block, simply invoke another EFP sequence • EFP cannot be suspended 3.3 EFP setup command The EFP Setup command, 30h, followed by the Confirm command, D0h, begins internal voltage ramp-up and WSM EFP algorithm start-up. An EFP setup delay is specified to allow the flash memory time to ramp the necessary voltages. Device reads, in EFP mode, return status register data. The device status register bit 7 (SR.7) is used to determine if EFP mode has been entered successfully. If SR.7=0, then the EFP program phase is entered. If SR.7=1, EFP mode was not successfully entered and the device checks SR.3 and SR.1 to determine if a VPP error or locked block prevented the device from entering EFP mode. The device then exits EFP mode. 3.4 Program data-stream operation Each write cycle after initiating EFP is a data write to the flash array. In standard EFP mode, the programming equipment polls the device status register after each data write to determine when programming is complete. At this point in EFP operation, status register bit SR.0 indicates that the device is ready for the next data write to occur. Although the programming equipment may check full status for errors at any time, it is only necessary after exiting the EFP mode. The flash memory address supplied for all data writes must remain within the block address range being programmed. The address can either be held constant, or it can increment within that block’s address range, see Table 1 on page 9. For a particular block the device stores the address supplied with the EFP Setup and Confirm commands and compares those block specific address bits with corresponding block address bits supplied with each successive data write. If a new block address supplied with the data matches the stored address, the device programs the new data word at the next sequential memory location. If the block addresses differ, and if data=FFFFh, EFP terminates the program data phase and the device enters verify data phase. To reduce internal voltage stress on the flash memory cells, the WSM may, at its discretion, reduce program voltage levels if a subsequent data word is not received within a predetermined time. Application Note March 2008 8 Order Number: 292286-02
  9. 9. Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming Table 1: Example of the EFP sequence Mode Address Data Operation Result 028000h 0060h Write Lock Setup command 028000h 00D0h Write Unlock Block command unlocks block EFP 028000h 0030h Write EFP Setup command Setup 028000h 00D0h Write EFP Confirm command 028000h Not required Delay EFP setup time 028000h Status Register Read Check status: SR.7=0 = Setup done 028000h Status Register Read Check status: SR.0=0 = data stream ready 028000h 0123h Write Program word 0123h @ 028000h 028000h or Status Register Read Check status (SR.0=0 = program done) 028001h 4567h Write Program word 4567h @ 028001h 028000h or Status Register Read Check status (SR.0=0 = program done) 028002h 89ABh Write Program word 89ABh @ 028002h EFP 028000h or Status Register Read Check status (SR.0=0 = program done) Program 028003h CDEFh Write Program word CDEFh @ 028003h 028000h or Status Register Read Check status (SR.0=0 = program done) 02FFFFh 17AFh Write Program word 17AFh @ 02FFFFh Status Register Read Check status (SR.0=0 = program done) 028000h or Address ≠ BBA Terminate program data-stream operation FFFFh Write BBA = Block Base Address 028000h Status Register Read Check status (SR.0=0 = verify stream ready) Not applicable Delay Timeout – transition to EFP verify mode 028000h 0123h Write Verify word 0123h @ 028000h 028000h or Status Register Read Check status (SR.0=0 = verify done) 028001h 4567h Write Verify word 4567h @ 028001h EFP 028000h or Status Register Read Check status (SR.0=0 = verify done) Verify 028002h 89ABh Write Verify word 89ABh @ 028002h 028000h or Status Register Read Check status (SR.0=0 = verify done) 028003h CDEFh Write Verify word CDEFh @ 028003h 028000h or Status Register Read Check status (SR.0=0 = verify done) 02FFFFh 17AFh Write Verify word 17AFh @ 02FFFFh 028000h or Status Register Read Check status (SR.0=0 = verify done) Address ≠ BBA FFFFh Write Terminate verify data-stream operation BBA = Block Base Address 028000h Status Register Read Check status: SR.7=1 = EFP exited EFP Full status check for block Exit 0080h = block programmed successfully 028000h Status Register Read 0090h = program error somewhere within block March 2008 Application Note Order Number: 292286-02 9
  10. 10. Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming 3.5 Program data-stream termination The program data-stream phase terminates when the host writes data=FFFFh to a block address different from the EFP Setup and Confirm command block address. The device then enters the EFP verify phase, which sets internal margined voltage levels of a factory-determined reference onto programmed cells for data comparison. The device waits for the first data to come from the programming equipment, which then starts the verify data-stream. 3.6 Verify data-stream operation A very high percentage of flash memory cells will program successfully during the program phase. The EFP verify data-stream phase identifies and re-programs any bits that did not fully program. The verify phase is identical in flow to the program phase, except that instead of programming incoming data, the WSM compares at an internal margin the incoming data with the data that was previously programmed into the memory block. The entire block is verified with no error flagging at this point. Error flagging does occur in the EFP exit phase when a full status check procedure is performed. When initiating the verification phase, the programming equipment must reset the starting verify-word address to the same beginning address supplied during the EFP Setup and Confirm commands. The host then reissues each data word in the same order that it did during the program data phase. The programmer, at the engineers’ discretion, may either write each data word to the beginning verify-word address, or it may increment addresses within the block’s address range. During the verification phase, the WSM compares the incoming data with the corresponding data that was previously programmed. The status register bit SR.0=0 is output by the flash memory to indicate that the verify operation is complete. If the data compares differently, the WSM automatically retries to program the appropriate cell(s) until either the data programs correctly or that location fails. Each successive write to the flash memory increments the internal address counter, so that the next sequential data location is accessed for that verify cycle. 3.7 Verify data-stream termination The verify data-stream terminates when the host writes data=FFFFh to a block address different from the beginning verify block address. At this point, the WSM exits EFP mode and the device sets internal cell voltages to the read-array level. The device displays status register data on outputs DQ0-DQ7, and then waits for the next programmer command to be issued. 3.8 EFP exit The flash memory status register indicates when internal voltages and circuits have returned to standard read-array operating conditions – this is determined by reading SR.7 = 1. A full status check is performed at this time to indicate any cumulative errors that occurred during EFP operation. It is at this point that the programmer determines whether the block was successfully programmed or not. The Read Array command can be issued at this time to place the device into a memory-array read state. Figure 1 on page 7 shows an example EFP exit sequence. Application Note March 2008 10 Order Number: 292286-02
  11. 11. Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming 4.0 What environments does EFP improve program and verify times? EFP saves time in all manufacturing programming environments; however, total time savings vary in different environments depending on several variables. EFP provides the most significant time savings in programming environments that consume system overhead associated with delivering addresses and commands to the flash memory. Device programmers and JTAG programmers typically fall within this category. EFP saves programming time with the lower overhead programming environments also. These types of environments typically are: in-system writes, automatic test-equipment and memory testers. Overall, when you use Numonyx flash memory EFP, you can anticipate manufacturing programming speed improvements in the range of 30 percent to 80 percent or more over conventional programming methods. 5.0 Benchmark data: comparing EFP to conventional programming on device programmers The following benchmark data shows a comparison of EFP mode vs. conventional programming mode on several device programmers. Because each device programmer functions differently, hardware is different, software is different, EFP provides varying results, see Figure 2. Figure 2: EFP vs. conventional programming times on device programmers 32M Program and Verify bit 2:24 1:55 1:26 0:57 0:28 0:00 EFP C entional onv EFP C entional onv D I/O U ata niSite D I/O ProLIN R ata E oadRunner* March 2008 Application Note Order Number: 292286-02 11
  12. 12. Reduce manufacturing costs using Numonyx™ Flash memory enhanced factory programming 6.0 Considerations for the device programmer environment EFP relies on the flash memory to perform internal verify operations. This is in contrast to conventional methods of performing external verify in a device programmer system. By incorporating the verify operation into the flash memory, much time is saved. However, consider that if the flash memory does not make sufficient contact with all programmer socket pins, a potential exists to program erroneous information into the device. You can overcome this issue by performing a continuity test on the flash memory before starting the EFP algorithm. The continuity test will abort programming operations if any flash memory pin does not make sufficient contact with the programmer socket. 7.0 Summary Manufacturing engineers continually search for ideas to make their assembly lines operate quicker, cheaper and better. Programming functions within the assembly line consume time. Numonyx addressed this manufacturing concern with flash memory programming technology called Enhanced Factory Programming. Numonyx flash memories featuring EFP help engineers speed up programming in their manufacturing lines from 30 percent to 80 percent or more over conventional programming methods. Only Numonyx flash memory components have the ability to program so quickly. By using Numonyx flash memories in your products, you reduce programming time and expense associated with manufacturing your products. Application Note March 2008 12 Order Number: 292286-02

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