Module 1 - Week 1 slides

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  • Bloom classified educational objectives into 6 semi-dependent levels. This is not an absolute – it is just a well-reasoned approach with experimental data to support it. There are many who take exception to this as a description of how people learn and what they learn, but nonetheless it is a very useful model for what we are trying to do (write instructional objectives!) The lowest level, knowledge, is the ability to recognize or recall information. This also could be thought of as acquiring the necessary vocabulary to engage in a discussion on a subject.
  • This goes beyond simply knowing a list of terms, but understanding their meaning. Learning at this level would give the student the ability to explain or paraphrase the information.
  • At this level, the student is able to apply the information to a given situation; typically this would be evidenced by the ability to solve a problem.
  • A student at this level of learning is able to use the information to analyze a situation and understand the relationships involved. This would give them the ability to compare or classify a different circumstance in terms of what they know.
  • Taking what they know to create something new. Students at this stage are doing design.
  • Students at this stage can use their knowledge to evaluate a circumstance, select from among alternatives, and justify their choice. This is also often seen as the ability to optimize a given process/situation. The last three levels of learning are typically considered higher-level thinking skills – although we often concentrate much more heavily on the first three in undergraduate education.
  • Module 1 - Week 1 slides

    1. 1. ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 1
    2. 2. Topics <ul><li>Introduction </li></ul><ul><li>Technology Trends </li></ul><ul><li>Course Administration </li></ul><ul><li>Microprocessor Systems Overview </li></ul><ul><li>Organization of Microprocessor Systems </li></ul>
    3. 3. Introduction <ul><li>Instructor </li></ul><ul><ul><li>Michael J. Schulte ( [email_address] , 262-0206) </li></ul></ul><ul><ul><ul><li>Office Hours: </li></ul></ul></ul><ul><ul><ul><ul><li>Monday, Wednesday: noon-1:30pm in 4619EH </li></ul></ul></ul></ul><ul><ul><ul><ul><li>Other times by appointment </li></ul></ul></ul></ul><ul><li>Teaching Assistants </li></ul><ul><ul><li>Bret Martin (bmartin@cae.wisc.edu) </li></ul></ul><ul><ul><ul><li>Office hours: </li></ul></ul></ul><ul><ul><ul><ul><li>Friday: noon-1:00pm in B630EH </li></ul></ul></ul></ul><ul><ul><li>Inge Yuwono (yuwono@cae.wisc.edu) </li></ul></ul><ul><ul><ul><li>Office hours: </li></ul></ul></ul><ul><ul><ul><ul><li>Tuesday: 4:00-5:00pm in B630EH </li></ul></ul></ul></ul>
    4. 4. Digital Technolgy <ul><li>For technology trends and challenges see International Technology Roadmap for Semiconductors (ITRS) website at: </li></ul><ul><ul><li>http://public.itrs.net/ </li></ul></ul>
    5. 5. Complexity Growth Source (Copp, Int. AOC EW Conf., 2002 )
    6. 6. Reliability and Cost <ul><li>Reliability </li></ul><ul><ul><li>VLSI circuits are more reliable than ever—How do we continue on this path? </li></ul></ul><ul><li>Cost </li></ul><ul><ul><li>Products are more affordable as cost of digital components is dropping </li></ul></ul><ul><ul><ul><li>2 MB flash memory ($2800.00, 1988) </li></ul></ul></ul><ul><ul><ul><li>256 MB flash memory ( $55.00, 2003) </li></ul></ul></ul><ul><ul><li>Must continue to contain the cost </li></ul></ul>
    7. 7. Course Administration <ul><li>Text / Class Notes / Web Resources </li></ul><ul><li>Course Supplement </li></ul><ul><li>Course Objectives </li></ul><ul><ul><li>Bloom’s Taxonomy </li></ul></ul><ul><li>Examinations and Grading ( Q&A ) </li></ul><ul><li>Documentation Standards </li></ul><ul><li>Reference Information </li></ul><ul><ul><li>Available on course homepage and at Bob’s copy shop </li></ul></ul>
    8. 8. Course Boot-Up <ul><li>Discussion Section: </li></ul><ul><ul><li>Originally on R from 5:00 to 6:00pm </li></ul></ul><ul><ul><li>How about on W from 5:00 to 6:00pm? </li></ul></ul><ul><ul><li>Midterm exams also on W from 5:00 to 6:30pm? </li></ul></ul><ul><li>Tentative Tutorial Schedule </li></ul><ul><li>Assignments </li></ul><ul><ul><li>Read Chapters 1, 2.1-2.6 </li></ul></ul><ul><ul><li>Homework #1 will be due Wednesday, February 2 nd (assigned early next week) </li></ul></ul>
    9. 9.  P Systems Overview
    10. 10.  P Systems Overview <ul><li>Embedded Systems and Applications </li></ul><ul><ul><li>Embedded microprocessors account for about 94% of all microprocessor sales. </li></ul></ul><ul><ul><li>Embedded microprocessors extend over a much larger performance range than PC’s. </li></ul></ul><ul><ul><li>Terminology </li></ul></ul><ul><li>GP Systems vs. Embedded Systems </li></ul><ul><ul><li>What are the key design parameters? </li></ul></ul><ul><li> P System Structure </li></ul><ul><li>Embedded System Design Flow </li></ul><ul><ul><li>Why have a structured design flow? </li></ul></ul>
    11. 11.  P Systems Overview
    12. 12.  P Systems Overview *Semiconductor Industry Association (SIA projects 1 billion transistors produced per person by 2008.)
    13. 13. 1 Requirements Analysis User needs 2 Specification 3 System Architecture 4 HW Design 5 HW Implementation 6 HW Testing 4 SW Design 5 SW Implementation 6 SW Testing 7 System Integration 8 System Validation 9 O & M, Evolution
    14. 14. Why the 80C188EB? <ul><li>Many possible devices to study (or use!)… </li></ul><ul><ul><li>Intel, Motorola, Microchip, Atmel, TI, Zilog, ARM, Rabbit, Siemens, Hitachi, etc., etc. </li></ul></ul><ul><li>Considerations </li></ul><ul><ul><li>Installed base and software compatibility </li></ul></ul><ul><ul><li>Development tool availability </li></ul></ul><ul><ul><li>Complexity and architectural issues </li></ul></ul><ul><ul><li>Computational capabilities </li></ul></ul><ul><ul><li>Quality/availability of textbooks </li></ul></ul><ul><li>Why not use the Pentium 4 instead? </li></ul>
    15. 15. The x86 Evolution
    16. 16. Simple  P Architecture <ul><li>Register View </li></ul><ul><li>Building Blocks and Signals </li></ul><ul><ul><li>Memory Cell </li></ul></ul><ul><ul><li>Signal Conventions </li></ul></ul><ul><ul><li>FF Implementation </li></ul></ul><ul><li>Registers </li></ul><ul><li>Register Files </li></ul><ul><li>Memory </li></ul><ul><li>I/O </li></ul>
    17. 17. Data Transfers <ul><li>Basic Bus Organization and Timing </li></ul>
    18. 18. Register View <ul><li>Register View of Register File </li></ul><ul><li>Register View of Memory </li></ul><ul><ul><li>Volatile vs. nonvolatile memory </li></ul></ul><ul><ul><li>Memory maps </li></ul></ul><ul><li>Register View of I/O </li></ul><ul><li>Operational Registers </li></ul><ul><ul><li>Accumulator </li></ul></ul><ul><ul><li>Flags </li></ul></ul>
    19. 19. Wrapping Up <ul><li>Homework #1 due Wednesday 2/4 </li></ul><ul><li>Reading for Week 2 </li></ul><ul><ul><li>Short 2.7-2.9, 3.1-3.4 </li></ul></ul><ul><li>Tutorial sessions in B540 EH </li></ul><ul><ul><li>Monday from 5:00 to 6:30 </li></ul></ul><ul><ul><li>Thursday from 6:00 to 7:30 </li></ul></ul>
    20. 20. Simplified Pentium 4 Architecture
    21. 21. Tentative Tutorial Schedule Monday, January 24th TASM & DA tutorial 5:00-6:30pm B540 EH Thursday, January 27th TASM & DA tutorial 6:00-7:30pm B540 EH Sign-up sheets will be circulated in class and then posted outside 4619EH.
    22. 22. Data Transfer Timing
    23. 23. Bloom’s Taxonomy of Educational Objectives: Cognitive Domain <ul><li>Knowledge – the ability to recognize or recall information </li></ul>1. Knowledge
    24. 24. Bloom’s Taxonomy of Educational Objectives: Cognitive Domain <ul><li>Comprehension – understand the meaning of information </li></ul>1. Knowledge 2. Comprehension
    25. 25. Bloom’s Taxonomy of Educational Objectives: Cognitive Domain <ul><li>Application – use the information appropriately </li></ul>1. Knowledge 2. Comprehension 3. Application
    26. 26. Bloom’s Taxonomy of Educational Objectives: Cognitive Domain <ul><li>Analysis – break the information into component parts and see relationships </li></ul>1. Knowledge 2. Comprehension 3. Application 4. Analysis
    27. 27. Bloom’s Taxonomy of Educational Objectives: Cognitive Domain <ul><li>Synthesis – put the components together in a different way to form new products or ideas </li></ul>1. Knowledge 2. Comprehension 3. Application 4. Analysis 5. Synthesis
    28. 28. Bloom’s Taxonomy of Educational Objectives: Cognitive Domain <ul><li>Evaluation – judge the worth of an idea, theory, or opinion based on criteria </li></ul>1. Knowledge 2. Comprehension 3. Application 4. Analysis 5. Synthesis 6. Evaluation Return
    29. 29. Questions... … and answers Midterm Exam #3 Final Exam
    30. 30. Memory Cell
    31. 31. Input Subsystem
    32. 32. Output Subsystem
    33. 33. Operational Registers

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