M16C Family M16C/62A, /62N, and /62P Boot Program Comparison ...
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  • 1. APPLICATION NOTE M16C Family REJ05B0148-0110Z M16C/62A, /62N, and /62P Boot Program Comparison for flash memory version Rev.1.10 Jul 25, 2003 1. Abstract This issue is the reference matelials ot make the boot program of M16C/62N or M16C/62P from the boot program of M16C/62A. 2. Introduction The explanation of this issue is applied to the following condition: Applicable MCU: M16C/62N Group, M16C/62P Group 3. Contents 3.1 Software Commands Comparison The list of the software commnad of M16C/62A is shown in the table 3.1.3 form the table 3.1.1. Table 3.1.1. List of M16C/62A Group software commands(Note1) First bus cycle Second bus cycle Third bus cycle Command Data Data Data Mode Address (D0 to D7) Mode Address (D0 to D7) Mode Address (D0 to D7) Read array Write X (Note 6) FF16 Read status register Write X 7016 Read X SRD (Note 2) Clear status register Write X 5016 Page program (Note 3) Write X 4116 Write WA0 (Note 3) WD0 (Note 3) Write WA1 WD1 Block erase Write X 2016 Write BA (Note 4) D016 Erase all unlock block Write X A716 Write X D016 Lock bit program Write X 7716 Write BA D016 Read lock bit status Write X 7116 Read BA D6 (Note 5) Note 1: When a software command is input, the high-order byte of data (D8 to D15) is ignored. Note 2: SRD = Status Register Data Note 3: WA = Write Address, WD = Write Data WA and WD must be set sequentially from 0016 to FE16 (byte address; however, an even address). The page size is 256 bytes. Note 4: BA = Block Address (Enter the maximum address of each block that is an even address.) Note 5: D6 corresponds to the block lock status. Block not locked when D6 = 1, block locked when D6 = 0. Note 6: X denotes a given address in the user ROM area (that is an even address). Rev.1.10 Jul 25, 2003 page 1 of 5
  • 2. M16C Family M16C/62A, /62N, and /62P Boot Program Comparison for flash memory version Table 3.1.2. List of M16C/62N Group software commands(Note1) First bus cycle Second bus cycle Command Data Data Mode Address (D0 to D7) Mode Address (D0 to D7) Read array Write X FF16 Read status register Write X 7016 Read X SRD (Note 2) Clear status register Write X 5016 Program (Note 3) Write WA 4016 Write WA (Note 3) WD (Note 3) Block erase Write X 2016 Write BA (Note 4) D016 Erase all unlock block Write X A716 Write X D016 Lock bit program Write BA 7716 Write BA D016 Read lock bit status Write X 7116 Read BA D6 (Note 5) Note 1: When a software command is input, the high-order byte of data (D8 to D15) is ignored. Note 2: SRD = Status Register Data (Set an address to even address in the user ROM area) Note 3: WA = Write Address (even address), WD = Write Data (16-bit data) Note 4: BA = Block Address (Enter the maximum address of each block that is an even address.) Note 5: D6 corresponds to the block lock status. Block not locked when D6 = 1, block locked when D6 = 0. Note 6: X denotes a given address in the user ROM area (that is an even address) : That command sequence is different form M16C/62A. Table 3.1.3. List of M16C/62P Group software commands(Note1) First bus cycle Second bus cycle Command Data Data Mode Address (D0 to D7) Mode Address (D0 to D7) Read array Write X FF16 Read status register Write X 7016 Read X SRD (Note 2) Clear status register Write X 5016 Program (Note 3) Write WA 4016 Write WA (Note 3) WD (Note 3) Block erase Write X 2016 Write BA (Note 4) D016 Erase all unlock block Write X A716 Write X D016 Lock bit program Write BA 7716 Write BA D016 Read lock bit status Write X 7116 Write BA D16 (Note 5) Note 1: When a software command is input, the high-order byte of data (D8 to D15) is ignored. Note 2: SRD = Status Register Data (Set an address to even address in the user ROM area) Note 3: WA = Write Address (even address), WD = Write Data (16-bit data) Note 4: BA = Block Address (Enter the maximum address of each block that is an even address.) Note 5: Please note that the second bus cycle is deferent from that of conventional M16C/62 group microcomputers. Read the bit6 of the flash memory control register 1 (FMR16) for lock bit status. “0” : lock, “1” : unlock . Note 6: X denotes a given address in the user ROM area (that is an even address). : That command sequence is different form M16C/62A. Rev.1.10 Jul 25, 2003 page 2 of 5
  • 3. M16C Family M16C/62A, /62N, and /62P Boot Program Comparison for flash memory version 3.2 Program Comparison A difference in the program is shown about the command which is different from M16C/62A in the list of the software command in the table 3.2.3 from the table 3.2.1. Table 3.2.1. Program Command M16C/62A Page Program M16C/62N,/62P Program Program: Program: mov.w #0,r3 ; receive number mov.w #0,r3 ; receive number mov.b #0,addr_l ; addr_l = 0 mov.b #0,addr_l ; addr_l = 0 mov.w sum,crcd ; for Read check command mov.w sum,crcd ; for Read check command Program_loop_1: Program_loop_1: add.w #1,r3 ; r3 +1 increment add.w #1,r3 ; r3 +1 increment mov.w r3,a0 ; r3 --> a0 mov.w r3,a0 ; r3 --> a0 mov.b data[a0],r0l mov.b data[a0],r0l mov.b r0l,addr_l[a0] ; Store address mov.b r0l,addr_l[a0] ; Store address cmp.w #259,r3 ; r3 = 259 ? cmp.w #259,r3 ; r3 = 259 ? jltu Program_loop_1 ; jump Program_loop_1 at r3<258 jltu Program_loop_1 ; jump Program_loop_1 at r3<258 ; ; mov.w #00ffh,r2 ; Read array command mov.w #00ffh,r2 ; Read array command jsr Command_write ; command_write jsr Command_write ; command_write mov.w #0070h,r2 ; Read SRD command mov.w #0070h,r2 ; Read SRD command jsr Command_write ; Command write jsr Command_write ; Command write lde.w [a1a0],r1 ; SRD read lde.w [a1a0],r1 ; SRD read mov.w #00ffh,r2 ; Read array command mov.w #00ffh,r2 ; Read array command jsr Command_write ; command_write jsr Command_write ; command_write cmp.b #80h,r1l ; error check cmp.b #80h,r1l ; error check jne Program_end jne Program_end ; ; mov.w #0041h,r2 ; Page program command mov.w #0,r3 ; writing number (r3=0) jsr Command_write ; command_write mov.b addr_h,a1 ; addr_h --> a1 mov.w #0,r3 ; writing number (r3=0) Program_loop_2: mov.b addr_h,a1 ; addr_h --> a1 mov.w #0040h,r2 ; Page program command Program_loop_2: jsr Command_write ; command_write mov.w r3,a0 ; r3 --> a0 mov.w r3,a0 ; r3 --> a0 mov.w data[a0],r1 ; data --> r1 mov.w data[a0],r1 ; data --> r1 mov.w addr_l,a0 ; addr_l,m --> a0 mov.w addr_l,a0 ; addr_l,m --> a0 ste.w r1,[a1a0] ; data write ste.w r1,[a1a0] ; data write ; ; mov.b r1l,crcin ; for Read check command mov.b r1l,crcin ; for Read check command mov.b r1h,crcin mov.b r1h,crcin ; ; add.w #2,addr_l ; address +2 increment add.w #2,addr_l ; address +2 increment add.w #2,r3 ; writing number +2 increment add.w #2,r3 ; writing number +2 increment cmp.w #255,r3 ; r3 = 255 ? cmp.w #255,r3 ; r3 = 255 ? jltu Program_loop_2 ; jump Program_loop_2 at r3<255 jltu Program_loop_2 ; jump Program_loop_2 at r3<255 Program_end: Program_end: mov.w crcd,sum ; for Read check command mov.w crcd,sum ; for Read check command bclr send_flg bclr send_flg mov.w #0,send_cnt mov.w #0,send_cnt mov.w #0,start_cnt mov.w #0,start_cnt jmp Flash_func_end ; jump Flash_func_end jmp Flash_func_end ; jump Flash_func_end Rev.1.10 Jul 25, 2003 page 3 of 5
  • 4. M16C Family M16C/62A, /62N, and /62P Boot Program Comparison for flash memory version Table 3.2.2. Lock Bit Program Command M16C/62A, /62N, /62P LB Program (A program is a common program, bacause an address in the first bus cycle is same as an address to program by the second bus cycle.) Program_LB: mov.w #1,r3 ; receive number (r3=1) mov.b #0feh,addr_l ; addr_l = ffh Program_LB_loop: mov.w r3,a0 ; r3 --> a0 mov.b data[a0],r0l mov.b r0l,addr_l[a0] ; Store address add.w #1,r3 ; r3 +1 increment cmp.w #4,r3 ; r3=4 ? jltu Program_LB_loop ; jump Program_LB_loop at r3<4 cmp.b #0d0h,data ; Confirm command check jne Program_LB_end ; jump Program_LB_end at Confirm command error mov.w #0077h,r2 ; Program LB command jsr Command_write ; command write mov.w #00d0h,r2 ; Confirm command ste.w r2,[a1a0] ; command write mov.w #00ffh,r2 ; Read array command jsr Command_write ; command write Program_LB_end: mov.w #0,start_cnt mov.w #0,send_cnt bclr send_flg jmp Flash_func_end ; jump Flash_func_end Table 3.2.3. Lead Lock Bit Status Command M16C/62A,/62N Read LB Status M16C/62P Read LB Status Read_LB: Read_LB: mov.w #1,r3 ; receive number (r3=1) mov.w #1,r3 ; receive number (r3=1) mov.b #0feh,addr_l ; addr_l = ffh mov.b #0feh,addr_l ; addr_l = ffh Read_LB_loop: Read_LB_loop: mov.w r3,a0 ; r3 --> a0 mov.w r3,a0 ; r3 --> a0 mov.b data[a0],r0l mov.b data[a0],r0l mov.b r0l,addr_l[a0] ; Store address mov.b r0l,addr_l[a0] ; Store address add.w #1,r3 ; r3 +1 increment add.w #1,r3 ; r3 +1 increment cmp.w #3,r3 ; r3=3 ? cmp.w #3,r3 ; r3=3 ? jltu Read_LB_loop ; jump Read_LB_loop at r3<3 jltu Read_LB_loop ; jump Read_LB_loop at r3<3 mov.w #0071h,r2 ; Read LB command mov.w #0071h,r2 ; Read LB command jsr Command_write ; command write jsr Command_write ; command write mov.w #00d0h,r2 ; ste.w r2,[a1a0] ; lde.w [a1a0],r1 ; read LB mov.b 1B5h,r1l ; FMR1(LB read) and.b #01000000b,r1l ; mov.w #00ffh,r2 ; Read array command mov.w #00ffh,r2 ; Read array command jsr Command_write ; command write jsr Command_write ; command write Read_LB_end: Read_LB_end: mov.w #1,start_cnt mov.w #1,start_cnt mov.w #1,send_cnt mov.w #1,send_cnt bset send_flg bset send_flg jmp Flash_func_end ; jump Flash_func_end jmp Flash_func_end ; jump Flash_func_end Rev.1.10 Jul 25, 2003 page 4 of 5
  • 5. M16C Family M16C/62A, /62N, and /62P Boot Program Comparison for flash memory version 4. Reference Renesas Technology Corporation Semiconductor Home page http://www.renesas.com/ E-mail Support E-mail: support_apl@renesas.com M16C/62A group data sheet Rev.B1 M16C/62N group data sheet Rev.1.1 M16C/62P group hardware manual Rev.1.11 (Use the latest version on the Home page: http://www.renesas.com/) Rev.1.10 Jul 25, 2003 page 5 of 5
  • 6. REVISION HISTORY M16C/62A, /62N, and /62P Boot Program Comparison for flash memory version Application Note Rev. Date Description Page Summary 1.10 Jul 25, 2003 - First edition issued
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