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  • Startup cost -> startup time

Lecture 3 Lecture 3 Presentation Transcript

  • DSP Architecture Differences and Examples of Embedded Computers Lecture 3 January 18, 2005 EENG 449b / CPSC 439b Computer Systems Andreas Savvides [email_address] Office: AKW 212 Tel 432-1275 Course Website http://www.eng.yale.edu/enalab/courses/2005s/eeng449b
  • Recap: 5 Steps of MIPS Datapath Memory Access Write Back Instruction Fetch Instr. Decode Reg. Fetch Execute Addr. Calc L M D MUX Memory Reg File MUX MUX Data Memory MUX Sign Extend Zero? Next SEQ PC Next PC WB Data RD RS1 RS2 Imm ALU 4 Adder Address Inst
  • How do DSP Processors Differ?
    • Designed for high performance, repetitive numerical intensive tasks
    • Distinct features:
      • Single cycle multiply accumulated instructions (MAC)
        • Useful for digital filters, FFTs, correlation computations
      • Several memory accesses in the same cycle
      • One or more address generation units
  • An example DSP processor datapath
  • Specialized Addressing Modes
    • Register indirect addressing with post increment
      • In MIPs we have add R4, (R1)
      • How would it be in DSP?
    • Modulo addressing
    • Bit-reverse addressing => FFT
      • FFTs algorithms shuffle their addressing
        • Eg 0,1,2,3,4,5 is accessed 0,4,2,6,1,5
  • Specialized I/O Handling Mechanisms
    • DSPs need to get a lot of data from outside world
      • Cameras, celphones, MP3 Players
    • Acquire data w/o processor interruption
      • Specialized interrupt schemes
      • DMA transfer units, specialized serial and parallel ports
      • Mutliport memories and independent memory banks
      • Multiple on chip buses
    • Tools disadvantages: general purpose processors have more tools available.
  • DSP Design Choices
    • Arithmetic format
      • Fixed Point vs. Floating Point
      • Fixed point: numbers are integers or fractions in fixed range
      • Floating point:
        • Exponent and mantissa
        • Mantissa x 2 exponent
    • Fixed vs. floating point tradeoffs?
  • DSP Data Widths & Speed
    • Floating point; mostly 32-bit
    • Fixed point: 16-bit
    • Speed factor:
      • Clock speed does not tell the whole story
      • MIPS is the common metric
      • Some DSPs use a VLIW architecture
  • Harvard vs. Von Neumann
  • Software Development Path
  • An Example Microcontroller OKI ML67Q5002 (Not a DSP!)
    • OKI ML67Q5002
      • 32-bit ARM7TDMI core (16-bit THUMB mode)
      • Built-in memory:
        • SRAM 32Kbytes
        • Boot ROM 4Kbytes
        • FLASH memory 256Kbytes
      • Provided interfaces:
        • 4 channels of 10-bit resolution ADC.
        • DMA support.
        • SPI, SIO, I2C, UART, PWM interfaces
        • 42 configurable GPIO pins
        • Variety of external and internal configurable interrupts
        • 6 hardware timers
    • Features
    • ARM7TDMI
    • ROM-less (ML675001)
    • 256KB MCP Flash (ML67Q5002)
    • 512KB MCP Flash (ML67Q5003)
    • 8KB Unified Cache
    • 32KB RAM
    • Interrupts 25 + 1 FIQ
    • I2C (1-ch x master)
    • DMA (2-ch)
    • Timers (7 x 16-bit)
    • WDT (16-bit)
    • PWM (2 x 16-bit)
    • UART (2-ch)/ SIO (1-ch)
    • GPIO (5 x 8-bit)
    • ADC (4-ch x 10-bit)
    • up to 66MHz
    • -40 ~ +85  C
    • Package 144 LFBGA
    • 144 QFP
    XYZ Computation: The OKI ARM ML675001/67Q5002/67Q5003 [Slide from OKI Semiconductor]
  • OKI ARM ML675001/67Q5002/67Q5003 ARM7TDMI
  • What does ARM7TDMI Mean?
    • Based on an ARM7 core
      • Von Neuman Architecture
        • Same address and data bus
      • Approximately 1.9 Clock cycles per instruction
      • T – Thumb architecture extension – 2 instruction sets
        • ARM 32-bits
        • Thumb 16-bits
      • D – Core has debug extensions
      • M – Core had an enhanced multiplier (32x8) with instructions for 64-bit results
      • I – Core has EmbeddedICE Logic Extensions
  • CPU States
    • CPU can be either in ARM or THUMB states
      • User can implicitly change the processor state from ARM to THUMB
      • All exception handling happens in ARM mode
      • If an exception happens during Thumb mode, the the processor transitions to ARM to execute the instruction and returns to THUMB at the end of the exception handler
    • THUMB mode trades-off performance for code density
      • Cheaper memory and lower power consumption for embedded systems
  • FLASH Starts here External SRAM starts here Internal RAM starts here
  • MCU Basics: What are interrupts?
    • Asynchronous breaks in the program execution
      • Press of a button, expiration of a timer, DMA interrupt indicating the completion of a memory transfer
    • When an interrupt occurs, the processor will transition to the corresponding interrupt handler to service the interrupt and then resume execution
    • The OKI processor has an 8-level interrupt priority mechanism
      • Total of 24 types of interrupts that can happen during instruction execution
        • 1 fast external interrupt
        • 4 external interrupts
        • 19 Internal interrupts
          • E.g System timer, watchdog timer, DMA interrupts etc
    • The chip has mechanisms for dealing with interrupts
      • Interrupts are enabled and disabled through registers for each peripheral
  • Hardware Timers(16-bit) Controls the mode (interval or one-shot) Starts and stops the timer Enables/disables the interrutps for this timer Holds value to compare against Holds the value that initializes the timer at startup
  • Clock Divider
  • Steps in Setting up a Hardware Timer
    • Example using hardware TIMER0
    • Stop timer & disable interrupts by writing to control register (TIMECNTL0)
    • Write the timer starting value to the base register (TIMEBASE0)
    • Write the stop value in the compare register (TIMECOMP0)
    • Start the timer by writing to the control register (TIMECNTL0)
    • This will start the timer. An interrupt will occur when the counter register reaches the value of the compare register
    • Note: After the interrupt is handled, the status register (TIMESTAT0)needs to be cleared to use the timer again.
  • How to you access peripherals?
    • You can access peripherals and GPIO by reading/writing registers
    • Typically one would write device drivers and then use higher level abstractions
    • You will need this knowledge to write device drivers for different peripherals and to assess the real-time capabilities of your software
  • Some platforms & applications
    • Seismic monitoring, personal exploration rover, mobile micro-servers, networked info-mechanical systems, hierarchical wireless sensor networks
    [NIMS, UCLA] [Robotics, CMU] [Intel + UCLA] [CENS, UCLA] [Intel + UCLA] [Slide from V. Ragunanthan]
  • A Generic Sensor Node Architecture PROCESSING SUB-SYSTEM COMMUNICATION SUB-SYSTEM SENSING SUB-SYSTEM POWER MGMT. SUB-SYSTEM ACTUATION SUB-SYSTEM
  • Base Case: The Mica Mote (The most popular sensing platform today) AVR 128, 8-bit MCU DS2401 Unique ID 51-PIN I/O Connector Transmission Power Control Hardware Accelerators Radio Transceiver (CC1000 or CC2420) Power Regulation MAX1678(3V) Co-processor External Flash Digital I/O Analog I/O Programming Lines For more information refer to the TinyOS Website http://www.tinyos.net
  • What is Stargate?
    • A single board, wireless-equipped computing platform
      • Developed at Intel Research
    • Leverages advances in computation, communication and storage to facilitate wireless systems research
  • System architecture
  • Computation sub-system
    • PXA255 processor based on the XScale microarch.
      • Successor to the StrongARM family
      • Variable clock (100 - 400 MHz), less than 500 mW power
      • Several sleep modes, rich set of peripherals
  • Wireless DPM: Hierarchical radios
    • Three vastly different wireless radios supported
    • Combined to form power-efficient, heterogeneous communication subsystem
      • Hierarchical device discovery and connection setup scheme leads to up to 40X savings in discovery power
    Energy per bit Startup time Idle current 160 mA 22 mA 7 mA Idle Current 802.11 Bluetooth Mote Technology Low 430 nJ/bit 10 mA 76.8 Kbps Medium 149 nJ/bit 45 mA 1 Mbps 90 nJ/bit Energy per bit 300 mA Tx Current High 11 Mbps Startup time Data Rate IEEE 802.11 Bluetooth Mote
  • Other power management features
    • Wake on wireless: Bluetooth based remote wakeup
      • BT module awake, rest of the system is shutdown
      • Incoming BT packet causes wakeup
      • On-demand power management (event-driven apps)
      • BT module in “wake on wireless” mode draws ~ 3mA
    • Motion detection for wake up
      • Passive small-bead mercury switch connected to GPIO
      • Movement causes switch to close and wakeup system
      • Can also be used to trigger wireless scanning for APs
  • UCLA iBadge
  • iBadge Functional Units
    • Main Processing Unit
      • ATMega128L Microcontroller from Atmel
      • Responsible for power management, localization, and interfaces different functional units
    • Localization Unit:
      • Relative and absolute positioning
      • responsible for obtaining precise 3D location of iBadge in the classroom
      • estimate s its 3D location using an ad-hoc localization process
    • Speech Processing Unit:
      • Consists of TI DSP and CODEC
      • Performs speech codec and front end processing of the real time speech of the children
      • Two modes (Simple Coding or Front End Processing) of operation based on power requirements and user request.
  • iBadge Functional Units (Continued)
    • Power Management/Tracking Unit:
      • Battery Monitors ( DS2438) keep track of energy usage of various functional units
      • CMOS switches provides control to turn on/off different part of the circuits
    • Orientation/Tilt Sensing Unit
      • Accelerometer combined with magnetometer provides the orientation of the children with earth’s magnetic field
    • Environment Sensing Unit
      • Temperature, Humidity, Atmospheric Pressure, and Light Intensity
  • Telos: New OEP Mote*
    • Single board philosophy
      • Robustness, Ease of use, Lower Cost
      • Integrated Humidity & Temperature sensor
    • First platform to use 802.15.4
      • CC2420 radio, 2.4 GHz, 250 kbps (12x mica2)
      • 3x RX power consumption of CC1000, 1/3 turn on time
      • Same TX power as CC1000
    • Motorola HCS08 processor
      • Lower power consumption, 1.8V operation , faster wakeup time
      • 40 MHz CPU clock, 4K RAM
    • Package
      • Integrated onboard antenna +3dBi gain
      • Removed 51-pin connector
      • Everything USB & Ethernet based
      • 2/3 A or 2 AA batteries
      • Weatherproof packaging
    • Support in upcoming TinyOS 1.1.3 Release
    • Codesigned by UC Berkeley and Intel Research
    • Available February from Moteiv (moteiv.com)
    • *D. Culler, UC Berkeley
  • Yale’s XYZ Sensor Node
    • Sensor node created for experimentation
      • Low cost, low power, many peripherals
      • Integrated accelerometer, light and temperature sensor
    • Uses an IEEE 802.15.4 protocol
      • Chipcon 2420 radio
    • OKI ARM Thumb Processor
      • 256KB FLASH, 32KB RAM
      • Max clock speed 58MHz, scales down to 2MHz
      • Multiple power management functions
    • Powered with 3AA batteries & has external connectors for attaching peripheral boards
    • Designed at Yale Enalab and Cogent computer systems, will be used as the main platform for the course
  • XYZ ’s Architecture
  • XYZ : Communication Subsystem
    • Chipcon CC2420 Zigbee RF Transceiver
      • 2.4 GHz IEEE 802.15.4 @ 250Kbps
      • Programmable output power
      • RX/TX data buffering
      • Digital RSSI support
      • DSSS modulation
      • Security features
        • CTR encryption/decryption
        • CBC-MAC authentication
        • CCM encryption and authentication
        • All security operations are based on AES encryption using 128 bits
  • XYZ : Supervisor Circuitry & Low Power Sleep 2.5V 3.3V WAKEUP Enable Interrupt (SQW) DS1337 Real Time clock datasheet: http://pdfserv.maxim-ic.com/en/ds/DS1337.pdf
    • Step 1 : The μ C selects the total time that wants to be turned off and programs the DS1337 accordingly, through the 2-wire serial interface.
    • Step 2 : The DS1337 turns-off the μ C and uses its own crystal to keep the notion of time.
    • Step 3 : The DS1337 wakes up the μ C after the programmed amount of time has elapsed.
    • Note that the DS1337 RTC can disable the voltage regulator and completely turn-off the sensor node!
    OKI μ C RTC DS1337 Voltage Regulator 3 x AA batteries I 2 C
  • XYZ : On Board Sensors A D C AIN0 AIN1 AIN2 X Y PIOE5(EXINT0) 2-axis accelerometer datasheet (ADXL202E): http://www.rotomotion.com/datasheets/ADXL202E_a.pdf Temperature Sensor datasheet (TMP05): http://www.analog.com/UploadedFiles/Data_Sheets/192632828TMP05_6_prk.pdf Light Sensor datasheet (TSL251R): http://www.goblack.de/desy/digitalt/sensoren/tsl-250/tsl250r.pdf Light Accelerometer Temperature OKI μ C
  • Current Efforts on XYZ Peripheral Boards
    • Ragobots @ UCLA
    • Suspended nodes and camera support @ Yale, ENALAB
  • Manufacturers of Microcontroller Based Sensor Nodes
    • Millenial Net ( www.millenial.com )
      • iBean sensor nodes
    • Ember ( www.ember.com )
      • Integrated IEEE 802.15.4 stack and radio on a single chip
    • Crossbow ( www.xbow.com )
      • Mica2 mote, Micaz, Dot mote and Stargate Platform
    • Intel Research
      • Stargate, iMote
    • Dust Inc
      • Smart Dust
    • Cogent Computer ( www.cogcomp.com )
      • XYZ Node (CSB502) in collaboration with ENALAB@Yale
    • Mote iv – Telos Mote
    • Sensoria Corporation (www.sensoria.com)
      • WINS NG Nodes
    • More….
  • Other Sensor Node Projects
    • Augmented off-the-shelf systems
      • PC104 computers (used in some habitat monitoring applications)
      • iPAQ PDAs (used for prototypes @ UCLA/CENS)
    • Networked Infomechanical Systems (NIMS)
      • www.cens.ucla.edu
    • Dedicated embedded sensor nodes and SOCs
      • MIT uAMP nodes
      • (http://www-mtl.mit.edu/research/icsystems/uamps/)
      • Berkeley BWRC picoradio node (http://bwrc.eecs.berkeley.edu/Research/Pico_Radio)
      • ISI Pasta node ( http://pasta.east.isi.edu )
  • Typical Operating Characteristics for 4 classes of Sensor Nodes Source: J. Hill, M. Horton, R. King and L. Krishnamurthy,”The Platforms Enabling Wireless Sensor Networks”, Communications of the ACM June 2004
  • Power Perspective Comparison of Energy Sources With aggressive energy management, ENS might live off the environment. Source: UC Berkeley & CENS
  • Many ways to Optimize Power Consumption
    • Power aware computing
      • Ultra-low power microcontrollers
      • Dynamic power management HW
        • Dynamic voltage scaling (e.g Intel’s PXA, Transmeta’s Crusoe)
        • Components that switch off after some idle time
    • Energy aware software
      • Power aware OS: dim displays, sleep on idle times, power aware scheduling
    • Power management of radios
      • Sometimes listen overhead larger than transmit overhead
    • Energy aware packet forwarding
      • Radio automatically forwards packets at a lower level, while the rest of the node is asleep
    • Energy aware wireless communication
      • Exploit performance energy tradeoffs of the communication subsystem, better neighbor coordination, choice of modulation schemes