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Fpga computing 14 03 2013

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Histroy of FPGA computing in Eurotech and ways to leverage FPGA for different functions

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  • Aurora systems are scalable from a single working unit to many computing racks with no performance degradation.High density, power efficiency and noiseless operation, thanks to extensive liquid cooling and to advanced packaging. A wide range of configurations is available. The node card is the main processing unit of every Aurora system. A blade hosting two Intel Xeon 5600 series processors (Six cores, up to 3.34GHz, TDP<130W), each connected to up to 24GB of 1333MHz DDR3 memory. CPUs are linked to peripherals via Intel chipset, using Intel QPI at 6.4GTps. One node has a computing power of 155Gflops and a typical power consumption of 350W.A large, high end FPGA allows implementation of a point to point 3D-Torus network for nearest neighbor communications. 3D-Torus interconnect comes with low latency (about 1µs), 60Gbps bandwidth, high robustness and reliability, thanks to redundant lines. Nodes host one Mellanox ConnectX2 device, with 40Gbps bandwidth and <2µs latency, used to implement a QDR Infiniband switched network.Reconfigurable computing functions such as acceleration, GPU-like co-processing are possible thanks to available logic resources on the FPGA (up to 700Gops per device).Aurora nodes are hosted in chassis: each of them features also an IB switch, with 20 QDR ports for QSFP cables. All chassis feature two monitoring and control networks, for reliable operation. Maintenance is possible also using a touch-screen interface on a monitor showing diagnostic data.Aurora Racks can contain up to 16 chassis each, and they provide mechanical support for accessand maintenance, power distribution, cables routing,and piping infrastructure for heat removal via a liquid cooling circuit.
  • Aurora systems are scalable from a single working unit to many computing racks with no performance degradation.High density, power efficiency and noiseless operation, thanks to extensive liquid cooling and to advanced packaging. A wide range of configurations is available. The node card is the main processing unit of every Aurora system. A blade hosting two Intel Xeon 5600 series processors (Six cores, up to 3.34GHz, TDP<130W), each connected to up to 24GB of 1333MHz DDR3 memory. CPUs are linked to peripherals via Intel chipset, using Intel QPI at 6.4GTps. One node has a computing power of 155Gflops and a typical power consumption of 350W.A large, high end FPGA allows implementation of a point to point 3D-Torus network for nearest neighbor communications. 3D-Torus interconnect comes with low latency (about 1µs), 60Gbps bandwidth, high robustness and reliability, thanks to redundant lines. Nodes host one Mellanox ConnectX2 device, with 40Gbps bandwidth and <2µs latency, used to implement a QDR Infiniband switched network.Reconfigurable computing functions such as acceleration, GPU-like co-processing are possible thanks to available logic resources on the FPGA (up to 700Gops per device).Aurora nodes are hosted in chassis: each of them features also an IB switch, with 20 QDR ports for QSFP cables. All chassis feature two monitoring and control networks, for reliable operation. Maintenance is possible also using a touch-screen interface on a monitor showing diagnostic data.Aurora Racks can contain up to 16 chassis each, and they provide mechanical support for accessand maintenance, power distribution, cables routing,and piping infrastructure for heat removal via a liquid cooling circuit.
  • Transcript of "Fpga computing 14 03 2013"

    1. 1. Enabling FPGA Computing on hybrid platformsVorträge ZKI AK-SupercomputingM. MazzantePaderborn, 14 03 2013
    2. 2. EUROTECH INTRODUCTION
    3. 3. Eurotech IntroductionGroup Global Footprint
    4. 4. HPC division highlights• The Eurotech HPC division focuses on designing, manufacturing, delivering and supporting high performance computing solutions• More than 14 years of history of delivering supercomputing systems and solutions to industry and academia• First worldwide company to market hot water cooled high performance computers. First hot water cooled HPC in the market delivered in 2009.• R&D capabilities nurtured in house and through collaboration with Universities and research centres in Europe: INFN, Julich, Regensburg, Daisy…• Founder member of ETP for HPC
    5. 5. Eurotech HPC project examples Ape mille, 1999-2002 Q-Pace, 2007-2009 Ape next, 2002-2005 Janus, 2006-2008 Aurora Science, 2008- 2010 Eurora 2012 Selex Elsag (E-security) Deep project 2012 2011-2012
    6. 6. FPGA COMPUTING
    7. 7. FPGA-Based AccelerationMain References• APENet Project (INFN) – 3D-Torus FPGA-based Interconnect for standard Clusters• JANUS-SSUE (INFN, Univ. Of Saragoza) – Fully reconfigurable Supercomputer• QPACE Project (Uni. Regensburg & Wuppertal) – 3D-Torus FPGA-based Interconnect for LQCD on CELL• AURORA (Eurotech) – Enabling FPGA-based acceleration in Hybrid HPC
    8. 8. APENET
    9. 9. JANUS - SSUE
    10. 10. JANUS-SSUE: Architecture • 16 computing nodes (SP) are interconnected through a 3D network (3D-Torus) each SP is connected to the external world through a I/O management board (IOP) • I/O interfaces provided by the IOP module: 2 1-GEth links 1 UART 1 USB 1 LVDS channel for high-speed I/O • the carrier board (PB) provides the 3D net, power generation/ distribution and clock management IOP PB SP10
    11. 11. JANUS-SSUE: PerformanceRef: CISE – JAN 06
    12. 12. JANUS-SSUE : the System
    13. 13. From C to VHDL
    14. 14. Performance Comparison
    15. 15. QPACE
    16. 16. AURORA TIGONUnleash the hybrid power
    17. 17. From 1 node to large petascale systemsNode Backplane Chassis Cooling System Rack
    18. 18. The Aurora TigonUnleash the hybrid powerKey Features:High Performance Density – 256 CPUs, 256accelerators, up to 350 TFlops in just 1.5 m2Energy efficiency– the Aurora direct coolingtarget datacenter PUE of 1.05, no need for airconditioning, up to 50% less energyProgrammability and compatibility – Based onstandard HPC cluster architecture. 100%compatibility with existing applications.Flexible Liquid Cooling– All components arecooled by water, temperature from 18 C to 52 Cand variable flow ratesReliability– 3 independent sensornetworks, soldered memory, no movingparts, uniform cooling, quality controls
    19. 19. The Aurora Tigon node card Node card • The node card is the main processing unit 2 X Intel Xeon E5 series 2X Nvidia Kepler K20 OR 2 X Intel Xeon Phi 5120D • An aluminum cold plate that cools the board smoothing temperature 2730 GFlops distributions and assuring maximum 800 W power consumption heat extraction efficacy 64 GB soldered memory • A large, high end FPGA allow implementation of a point to point 3D- Torus network
    20. 20. The Aurora TigonNode card architecture • 2 Intel Sandy Bridge Xeon E5 CPUs connected via Quick Path Interconnect QPI at 8.0GT/s. • The system hub (I/O Bridge) is an Intel Patsburg chipset and provides connectivity between the CPUs and the rest of the system • One SATA disk or SSD, used to provide local fast and permanent storage • A Mellanox QDR/FDR adapter is connected to one of the CPU’s via one x8 PCIe 2.0 link. • An Altera Stratix V FPGA is connected with an 2 PCIe2.0 x8, one to each CPU.
    21. 21. Aurora FPGA: 3D Torus network processor• Each Node Card provides 6 full-duplex links (X+, X-, Y+, Y-, Z+, Z-).• Each link is physically implemented by two lines (main and redundant) that can be selected (in software) to configure the machine partitioning (full 3D Torus or one of the many 3D sub-tori available). 2xPCIe 3.0 x8
    22. 22. OpenCL and FPGAs• Altera OpenCL Rodmap
    23. 23. Energy Efficient FP Computing • Green FP Computing with FPGA
    24. 24. Thank You
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