UNIVERSITY OF CALIFORNIA, SAN DIEGO

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UNIVERSITY OF CALIFORNIA, SAN DIEGO

  1. 1. UNIVERSITY OF CALIFORNIA, SAN DIEGO Digital-IF SiGe BiCMOS Transmitter IC for 3G WCDMA Handset Application A dissertation submitted in partial satisfaction of the requirements for the degree Doctor of Philosophy in Electrical Engineering (Electronic Circuits and Systems) by Vincent Wing-Ching Leung Committee in charge: Lawrence E. Larson, Chair Peter M. Asbeck Laurence B. Milstein Andrew C. Kummel William G. Griswold Prasad S. Gudem 2004 i
  2. 2. Copyright Vincent Wing-Ching Leung, 2004 All rights reserved. ii
  3. 3. Signature Page iii
  4. 4. Dedication To my wife Venus, To our son Ivan, & to my parents. 給明茵, 宇謙, 和我的父母親 iv
  5. 5. Table of Contents SIGNATURE PAGE .......................................................................................................... III DEDICATION .................................................................................................................. IV TABLE OF CONTENTS ..................................................................................................... V LIST OF FIGURES ........................................................................................................ VIII LIST OF TABLES ......................................................................................................... XIII ACKNOWLEDGEMENTS ...............................................................................................XIV VITA, PUBLICATIONS AND FIELDS OF STUDY ........................................................... XVII ABSTRACT ...................................................................................................................XIX CHAPTER 1 INTRODUCTION ....................................................................................... 1 1.1 3G Wireless System and Wideband CDMA ...................................................... 3 1.1.1 Analog 1G and Digital 2G ....................................................................... 3 1.1.2 Vision and Evolution of 3G ..................................................................... 5 1.1.3 Wideband CDMA .................................................................................... 6 1.2 Transmitter IC for WCDMA Handset.............................................................. 10 1.2.1 Transmitter IC Fundamentals................................................................. 11 1.2.2 WCDMA Transmission Specifications.................................................. 16 1.3 SiGe BiCMOS Process..................................................................................... 22 1.3.1 SiGe HBT Basics ................................................................................... 24 1.3.2 IBM 6HP Process................................................................................... 28 1.4 Dissertation Objectives and Organization ........................................................ 31 CHAPTER 2 HIGHLY-INTEGRATED TXIC ARCHITECTURE ..................................... 35 2.1 Survey of TxIC Architectures for WCDMA Handsets .................................... 36 2.1.1 Heterodyne Transmitter Architecture .................................................... 36 2.1.2 Homodyne Transmitter Architecture ..................................................... 42 2.2 Digital-IF Transmitter Architecture ................................................................. 46 v
  6. 6. 2.2.1 Architecture Overview........................................................................... 46 2.2.2 Digital Quadrature Modulator................................................................ 47 2.2.3 Problem of Reconstruction (IF) Filtering............................................... 48 2.2.4 Frequency Planning Scheme.................................................................. 51 2.2.5 High-Order-Hold DAC .......................................................................... 53 2.2.6 Pulse-Shaping and Interpolation Filters................................................. 58 2.2.7 Summary of the Transmitter Architecture ............................................. 65 2.3 Spurious Emission Simulations........................................................................ 66 2.4 Summary........................................................................................................... 73 CHAPTER 3 LOW-POWER TXIC CIRCUITS .............................................................. 75 3.1 8-bit 250 Msps SOH DAC ............................................................................... 77 3.1.1 Circuit Design ........................................................................................ 77 3.1.2 Measured Results ................................................................................... 84 3.2 SSB Mixer ........................................................................................................ 93 3.2.1 Circuit Design ........................................................................................ 93 3.2.2 Measured Results ................................................................................... 99 3.3 RFVGA........................................................................................................... 105 3.3.1 Circuit Design ...................................................................................... 105 3.3.2 Measured Results ................................................................................. 108 3.4 Summary......................................................................................................... 113 CHAPTER 4 AMPLIFIER LINEARITY IMPROVEMENT BY ENVELOPE INJECTION .. 115 4.1 Linearity Analysis of Envelope Injection Technique ..................................... 116 4.2 Discussions on Theoretical Results ................................................................ 121 4.3 Comparison of Measurement and Simulation Results ................................... 124 4.4 Summary......................................................................................................... 126 CHAPTER 5 MEASURED TXIC RESULTS ................................................................ 127 5.1 Experimental Setup ........................................................................................ 128 5.2 Measured Results............................................................................................ 130 5.3 Summary......................................................................................................... 140 vi
  7. 7. CHAPTER 6 CONCLUSIONS ..................................................................................... 142 6.1 Key Research Results ..................................................................................... 142 6.2 Directions for Future Research....................................................................... 144 REFERENCES .............................................................................................................. 146 vii
  8. 8. List of Figures Figure 1.1 Increase of mobile service subscribers over the years. ................................. 2 Figure 1.2 Comparison of (a) FDMA and (b) TDMA concepts..................................... 5 Figure 1.3 The conceptual CDMA concept.................................................................... 8 Figure 1.4 Principle of spreading and despreading in CDMA. ..................................... 9 Figure 1.5 Block diagram of a cellular handset, showing the position of the TxIC..... 11 Figure 1.6 Conceptual diagram of the quadrature modulator....................................... 12 Figure 1.7 Conceptual diagram of an up-conversion single-sideband mixer............... 15 Figure 1.8 A sample plot of measured spectral regrowth............................................. 18 Figure 1.9 Spectral emission mask specifications. ....................................................... 19 Figure 1.10 Illustration of error vector and the related parameters. ............................. 20 Figure 1.11 (a) Schematic device cross section of a SiGe HBT, and (b) the micro- photographic view [48]. .................................................................................. 25 Figure 1.12 Energy band diagram of a graded-base SiGe HBT compared to a Si BJT. ......................................................................................................................... 25 Figure 1.13 SiGe HBT, whose fT is inherently higher than that of silicon for the same bias current, can trade off the excess speed to achieve a low-power solution. ......................................................................................................................... 27 Figure 1.14 Current consumption of PA and TxIC versus the transmitter output power, and the output power probability distribution function. A poorly designed TxIC can substantially reduce overall transmitter efficiency. ........................ 32 Figure 2.1 Block diagram of a conventional heterodyne transmitter. .......................... 38 Figure 2.2 Two variable-IF heterodyne architectures which eliminate the external IF filter by (a) implementing a complex-IF filter, and (b) adopting a frequency planning scheme.............................................................................................. 41 Figure 2.3 Block diagram of a typical homodyne transmitter...................................... 43 Figure 2.4 Heterodyne transmitter with digital IF modulator. ..................................... 46 viii
  9. 9. Figure 2.5 Locations of digital images when (a) L = 16, and (b) L = 32. The “black” signal is the desired signal and the “white” are the digital images. ................ 50 Figure 2.6 Frequency planning illustration: locations of images when the channel is at (a) the lower or (b) the upper edge of the WCDMA Tx band. ....................... 52 Figure 2.7 Transient waveforms of (a) S/H DAC and (b) FOH DAC, and (c) their corresponding spectrum rolloffs. .................................................................... 54 Figure 2.8 Signal processing of (a) a FOH DAC and (b) a Kth-order hold DAC......... 56 Figure 2.9 Output waveforms of the (a) ZOH, (b) FOH, and (c) SOH DAC............... 58 Figure 2.10 (a) Magnitude responses of the comb filter of order 3 to 6, and (b) the filtered 3x-upsampled spectrum. (fclk = 23.04 MHz). ..................................... 61 Figure 2.11 Spectrum of the 11x up-sampled signal after the 3rd-order comb filter (fclk = 253.44 MHz)................................................................................................ 62 Figure 2.12 An efficient implementation of a Nth-order comb lowpass filter for an L- times interpolation........................................................................................... 62 Figure 2.13 (a) Spectrum of the digital-IF signal, and (b) the corresponding spectrum expressed in dBc over the respective measurement bandwidth...................... 63 Figure 2.14 Spectrum of the digital-IF signal in dBc over measurement bandwidth with 5-bit or 8-bit of resolution....................................................................... 65 Figure 2.15 The proposed transmitter architecture featuring a SOH DAC. ................. 66 Figure 2.16 Output spectrum of the TxIC from dc to 12.5 GHz. ................................. 68 Figure 2.17 Simulated output spectrum of the TxIC in the DCS and WCDMA bands. ......................................................................................................................... 69 Figure 2.18 Simulated output spectrum of the TxIC when the SOH DAC is replaced by a conventional ZOH DAC.......................................................................... 70 Figure 2.19 Combined magnitude responses of the RF bandpass SAW filter and the duplexer filter.................................................................................................. 72 Figure 2.20 Transmit signal spectrum at the antenna, expressed in dBc/ 5MHz, (a) from DC to 12.5 GHz, and (b) near the DCS/ WCDMA bands. Maximum (worst-case) TxIC output power of +24 dBm is assumed. ............................. 73 Figure 3.1 Block diagram of the WCDMA handset TxIC (analog/RF frontend chip). 77 ix
  10. 10. Figure 3.2 Simplified schematic of the SOH DAC core, featuring the dominantly capacitive load................................................................................................. 78 Figure 3.3 Single-ended conceptual diagram of the 16 to 1 capacitor divider network. ......................................................................................................................... 80 Figure 3.4 (a) Schematic of the bottom current source array (showing the MSB segment only), and (b) the plan for the complete common-centroid current source layout. .................................................................................................. 83 Figure 3.5 Schematic of the IFVGA. It implements the second integrator for the SOH D/A conversion. .............................................................................................. 84 Figure 3.6 Micro-photograph of the SOH DAC test cell. ............................................ 85 Figure 3.7 Illustration of test setup for the DAC evaluation. ....................................... 86 Figure 3.8 A typical probe station setup for subsystem test chip evaluation. .............. 87 Figure 3.9 (a) Measured SOH DAC output transient waveform, and (b) the measured spectrum from dc to 1 GHz. The spectrum exhibits the elevated [sin(x)/x]3 image rolloff, confirming the SOH D/A conversion behavior........................ 89 Figure 3.10 Measured SFDR of the SOH DAC. .......................................................... 90 Figure 3.11 Measured SOH DAC two-tone (a) transient waveform and (b) spectrum. ......................................................................................................................... 91 Figure 3.12 Measured ACLR results of the SOH DAC. .............................................. 91 Figure 3.13 Comparison of the SOH DAC to other commercial 8-bit DAC solutions regarding conversion speeds and current consumptions................................. 92 Figure 3.14 Broadband 90o phase shifter. .................................................................... 93 Figure 3.15 (a) Calculated phase output responses of the 90o phase shifter circuits, and (b) their differences......................................................................................... 96 Figure 3.16 (a) Divide-by-two circuit for the quadrature LO generation, and (b) implementation of each latch. ......................................................................... 97 Figure 3.17 Implementation of mixer variable-gain through (a) a bleeder circuit, and (b) a translinear stage. The translinear circuit is more power efficient as current consumption will drop with the mixer gain simultaneously............... 98 Figure 3.18 Single-sideband up-conversion mixer core............................................... 99 x
  11. 11. Figure 3.19 Micro-photograph of the single-sideband mixer test cell. ...................... 100 Figure 3.20 Setup for the SSB mixer experimentation............................................... 100 Figure 3.21 (a) Measured mixer gain versus the control current (Ictrl), and (b) the measured total mixer current consumption versus the gain.......................... 101 Figure 3.22 A sample measured output spectrum of the SSB mixer. A single-tone IF input is applied for LO leakage and sideband rejection measurements........ 102 Figure 3.23 Measured LO and sideband rejection versus the mixer gain. ................. 103 Figure 3.24 Measured mixer compression behavior. ................................................. 103 Figure 3.25 Measured WCDMA spectrum of the SSB mixer at the maximum average output power. ................................................................................................ 104 Figure 3.26 Measured mixer ACLR results versus output power levels.................... 105 Figure 3.27 Simplified schematic of the RFVGA. The two stage design features adaptive bias schemes to make linearity requirements while minimizing the quiescent current consumptions. ................................................................... 106 Figure 3.28 Power detector bias control circuit..........................................................107 Figure 3.29 Microphotograph of the RFVGA test chip. ............................................ 109 Figure 3.30 Experimental setup for the RFVGA test chip evaluation. ...................... 109 Figure 3.31 Measured current consumption of the RFVGA versus the input power level............................................................................................................... 110 Figure 3.32 Measured gain compression of the RFVGA versus output power level. 111 Figure 3.33 Measured ACLR of RFVGA showing the linearity improvements due to the power detector bias control. .................................................................... 112 Figure 3.34 Measured RFVGA ACLR results versus output power. Linearity improvement is observed over a wide range of power level......................... 113 Figure 4.1 Conceptual diagram of the adaptive-bias RF amplifier. The power detector adjusts the dc bias in response to the input power. ....................................... 117 Figure 4.2 Nonlinear amplifier model, for Volterra analysis using method of nonlinear currents [89]. The fundamental signals are found by setting the nonlinear current sources to zero, while higher-order distortion voltages are evaluated by setting the signal source to zero. .............................................................. 118 xi
  12. 12. Figure 4.3 Vector diagram illustrating the cause of IMD3 asymmetry. Vectors 4 and represent the injected envelope signal. Note that the two resulting IMD vectors will have different amplitudes depending on the phase of the envelope. ............................................................................................. 122 Figure 4.4 Vector diagram showing optimal IMD3 cancellation. Note that the injected envelope signal cancels the third-order components when its phase and amplitude are optimized................................................................................ 124 Figure 4.5 IMD3 reduction versus input when the envelope detector is enabled. Good agreement is observed between the calculation and measured results, thus confirming the Volterra series analysis......................................................... 125 Figure 4.6 Comparison between calculation and simulation of IMD asymmetry with varying envelope injection phase. Maximum IMR3 cancellation is achieved when the envelope signal is injected with the optimal phase relative to the RF inputs............................................................................................................. 126 Figure 5.1 TxIC chip microphotograph. It measures 1.8 x 2.2 mm2. ......................... 128 Figure 5.2 Pictures of (a) the quad flat no-lead package, and (b) the bonded TxIC chip. ....................................................................................................................... 129 Figure 5.3 Experimental setup for the TxIC chip evaluation. .................................... 129 Figure 5.4 (a) Laboratory bench for TxIC evaluation, and (b) close-up of the PCB. 130 Figure 5.5 (a) The measured TxIC output spectrum in the DCS and WCDMA bands. (b) Normalized and including the external filter attenuation, it is shown to meet the spurious emission requirements. .................................................... 131 Figure 5.6 Measured TxIC residual sideband and LO leakage. ................................. 133 Figure 5.7 Measured TxIC WCDMA output spectrum (Pout = +5.5 dBm). ............... 134 Figure 5.8 Measured TxIC ACLR’s versus gain control. .......................................... 134 Figure 5.9 Measured occupied bandwidth of the TxIC WCDMA output.................. 135 Figure 5.10 Measured TxIC noise in the WCDMA Rx band..................................... 136 Figure 5.11 Measured TxIC QPSK constellation for Pout = +5.5 dBm. ..................... 136 Figure 5.12 Measured TxIC current consumption. .................................................... 137 xii
  13. 13. List of Tables Table 1.1 Comparison of wireless standards: GSM, GPRS, EDGE and WCDMA. .... 10 Table 1.2 Spurious emission requirements for WCDMA handsets. ............................ 21 Table 1.3 Summary of WCDMA handset transmission specifications, and measured TxIC performances of published work [26]-[35]. ............................................ 22 Table 1.4 Summary of IBM’s 6HP SiGe BiCMOS process parameters...................... 30 Table 1.5 List of process technologies employed by the published TxIC works [26]- [35]. .................................................................................................................. 31 Table 2.1 Comparison of WCDMA TxIC Architecture............................................... 37 Table 2.2 Comparison between the conventional S/H (ZOH) DAC and the FOH DAC. .......................................................................................................................... 55 Table 2.3 Spurious emission specifications recalculated in dBc/5MHz. ..................... 71 Table 5.1 Summary of Measured TxIC performances. .............................................. 139 Table 5.2 Comparison of published WCDMA TxIC work. ....................................... 140 xiii
  14. 14. Acknowledgements The text of Chapter Two, Three, Four and Five, in part or in full, is a reprint of the material as it appears in Proceedings of IEEE 57th Vehicular Technology Conference, and 2004 IEEE International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers, or has been accepted for publication in IEEE Transactions on Vehicular Technology, and IEEE Journal of Solid-State Circuits, or has been accepted for presentation in 2004 IEEE Custom Integrated Circuits Conference (CICC). The dissertation author was the primary researcher and the first author listed in these publications. He directed and supervised the research which forms the basis for these chapters. The past 3 years, during which this research was intensely conducted, can be characterized as thrilling. The Ph.D. pursuit was as much a test to one’s intellectual power as a trial to his perseverance. The journey, I must admit, was tough, which made me particularly thankful for the support and help of many individuals. I am uniquely advantaged to have two awesome supervisors, and I do not think I can possibly thank them enough. Prof. Lawrence Larson had created the ideal environment in which I could fully enjoy conducting original research. I had the best educational experiences while learning from his profound knowledge and expertise. And his unequivocal trust and unfailing encouragement were what got me through the most difficult and doubtful moments. Dr. Prasad Gudem (formerly affiliated with IBM, now with Qualcomm) is a fantastic mentor. He had substantially enriched and xiv
  15. 15. refined this research with his extraordinarily sharp and intuitive perception on technical issues. He had a genuine desire to teach and help, and had made himself incredibly available to ensure I am well supported in all circumstances. I am indebted to Prof. Peter Asbeck, Prof. William Griswold, Prof. Andrew Kummel and Prof. Laurence Milstein, for their generous efforts to serve on my thesis examination committee. I would like to thank Semiconductor Research Corporation (SRC) and the sponsoring companies of the “SRC SiGe Design Challenge” for the IC chip fabrication. I also want to gratefully acknowledge the financial support from the UCSD Center for Wireless Communications and its Member Companies, and a UC Discovery Grant. I thank Dr. Paul Chominski of Jaalaa and Mr. David Rowe of Sierra Monolithics for many helpful comments and discussions. At UCSD, I would like to acknowledge Mr. Peter Sagazio for designing and implementing the digital-IF section on a FPGA; Ms. Karina Garcia for programming the digital pattern generator; Mr. Junxiong Deng for assisting in Volterra series linearity analysis; and Mr. Chi-Shuen Leung for writing an automatic test routine for a spectrum analyzer. I also want to thank other accomplished colleagues in Prof. Larson’s and Prof. Asbeck’s groups for countless uplifting conversations and kind laboratory assistances. The brothers and sisters of the Chinese Bible Church of San Diego deserved my special thanks. They were my companions in Christ, and they shared my struggles and xv
  16. 16. joy. It is a warm feeling to know that my family is safely blanketed in their love and care. I express my most sincere appreciation to my wife Venus, who has wholeheartedly put my best interest to the very top of her priorities. While I focused on the research and could not distinguish days from nights, she had silently prayed for me, offered support, and managed everything. She deserves all of my achievements and honors, if any. My cheerful son Ivan was born at about the same time the silicon chip of this research got fabricated. He had been a fountain of bliss and wonder to my family. He had made our last year of stay in San Diego remarkably memorable, as if “City Paradise” and gorgeous sunset were not enough. Lastly, I would like to express my utmost gratitude to my Heavenly Father. Without His providence and guidance, none of the amazing things mentioned above would have happened. To me, what made the suspense of Ph.D. studies bearable was His gracious assurance: The Lord is my shepherd, I shall not want (Psalm 23:1). My family had truly witnessed His blessings in abundance. xvi
  17. 17. Vita 1995 B. Eng. EE (Honors), McGill University, Montreal, Canada 1997 M. Eng. EE, McGill University, Montreal, Canada Dissertation: Analysis and Compensation of Log-Domain Filter Deviations due to Transistor Nonidealities 1997-2000 Analog IC Designer, Analog Devices, Somerset, NJ 2004 Ph. D. EE, University of California, San Diego Dissertation: Digital-IF SiGe BiCMOS Transmitter IC for 3G WCDMA Handset Application 2004 Research Staff Member, IBM T.J. Watson Research Center, Yorktown Heights, NY Publications B. Song, V. Leung, T. Cho, D. Kang and S. Dow, “A 2.4GHz bluetooth transceiver in 0.18μm CMOS,” Proc. IEEE Asia-Pacific Conf. on ASIC, pp. 117-120, Aug. 2002. V. Leung, L. Larson and P. Gudem, “An improved digital-IF transmitter architecture for highly-integrated WCDMA mobile terminals,” Proc. IEEE 57th Vehicular Tech. Conf., vol. 2, pp. 1335 -1339, Jeju, Korea, Apr. 2003. V. Leung, L. Larson and P. Gudem, “An ultra-low-power SiGe BiCMOS transmitter IC for 3G WCDMA mobile phone applications,” Proc. Semiconductor Research Corporation TECHCON, Dallas TX, Aug. 2003. (The work was awarded Second Prize of the SRC SiGe Design Challenge.) V. Leung, P. Gudem and L. Larson, “Dynamically-biased driver amplifier for WCDMA mobile phone transmitter applications,” IEEE Topical Workshop on Power Amplifiers for Wireless Communications, San Diego, CA, Sept. 2003. V. Leung, L. Larson and P. Gudem, “Digital-IF WCDMA handset transmitter IC in 0.25um SiGe BiCMOS,” ISSCC Dig. Tech. Papers, pp. 182-183, Feb. 2004. xvii
  18. 18. V. Leung, L. Larson and P. Gudem, “An improved digital-IF transmitter architecture for highly-integrated WCDMA mobile terminals,” accepted for publication in IEEE Trans. on Vehicular Technology. V. Leung, J. Deng, P. Gudem and L. Larson, “Analysis of envelope signal injection for improvement of RF amplifier intermodulation distortion,” to be presented at IEEE Custom Integrated Circuit Conf., Orlando, FL, Oct. 2004. V. Leung, L. Larson and P. Gudem, “Digital-IF WCDMA handset transmitter IC in 0.25um SiGe BiCMOS,” accepted for publication in IEEE J. Solid-State Circuits (special Dec. issue on ISSCC 2004). Fields of Study Major Field: Electrical Engineering Studies in Circuit and System Design for Wireless Communications. Professor Lawrence E. Larson and Dr. Prasad S. Gudem Studies in Analog Integrated Circuit Design. Professor Gordon W. Roberts, McGill University, Montreal, Canada xviii
  19. 19. Abstract ABSTRACT OF THE DISSERTATION Digital-IF SiGe BiCMOS Transmitter IC for 3G WCDMA Handset Application by Vincent Wing-Ching Leung Doctor of Philosophy in Electrical Engineering (Electronic Circuits and Systems) University of California, San Diego, 2004 Professor Lawrence E. Larson, Chair The expansion of mobile communication market has been remarkable. From originally providing voice service, the wireless industry has gradually evolved to enable high bit-rate multi-media communications. Within the next generation (3G) framework, the WCDMA system has emerged as a standard. xix
  20. 20. There is enormous pressure to reduce the size, cost and power consumption of the cellular handsets. While digital circuits have experienced tremendous power saving and enhanced functionalities with the progress of deep sub-micron processes, the analog/RF sections remain the bottleneck. This dissertation focuses on the design of a highly-integrated low-power transmitter IC (TxIC) in a 0.25 μm SiGe BiCMOS technology for the WCDMA handset applications. The TxIC employs an improved highly-integrated digital-IF architecture. Excellent EVM performance is achieved due to the inherently mismatch-free digital quadrature modulation. The architecture eliminates the external IF SAW filter by adopting an optimal frequency plan and a special-purpose D/A conversion scheme which produces high-order sin(x)/x rolloff. Spurious emission requirements are then met with no dedicated reconstruction filter circuits. As the D/A boundary is shifted closer to the antenna, the architecture will take full advantage of future CMOS technology scaling. Smart-power circuit techniques are researched. A high-speed DAC is designed to drive a dominantly capacitive load employing very low bias current. The up- conversion mixer, by means of a translinear transconductor, will effectively scale down the power usage for gain control. The RF amplifier features an adaptive bias scheme based on a power detector circuit, so that high linearity can be simultaneously achieved with high efficiency. xx
  21. 21. To provide further linearity improvement without increasing the quiescent current consumption, a linearization technique based on envelope signal injection is proposed. It is analyzed rigorously using the Volterra method, and the theoretical predications match very well with the measured and simulated results. Experimentations on the fabricated TxIC chip have confirmed its correct functionality in all aspects, with state-of-the-art performance that meets WCDMA transmission requirements. It also compares very favorably to other published work in terms of level of integration and power consumption. xxi
  22. 22. CHAPTER 1 Introduction It is hard to overstate how profoundly the advancement of cellular technology has changed the means by which we communicate. By allowing its users to stay in touch without being physically tied to a fixed location, and with ever improving quality and affordability, the wireless service has become a daily necessity for a growing portion of the population. This “anytime anywhere” voice communication allows a level of flexibility and convenience that, once experienced, is almost inconceivable to relinquish. The cellular technology promises to continue its penetration to our society the way wired telephony did a century ago. The popularity of wireless service can be best illustrated through the explosive growth of the number of subscribers. As shown in Figure 1.1, the number of mobile subscribers has grown over 100-fold in the past ten years [1]. Today there are over one billion users in the world, and the number is still growing in a healthy pace. It is expected that the global number of mobile subscribers will surpass that of the fixed network subscribers at some point in the near future [2]. 1
  23. 23. 2 1200 Cellular subscribers (millions) 1000 800 600 400 200 0 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 Year Figure 1.1 Increase of mobile service subscribers over the years. For many business and home users, wireless has already become the method of choice for voice communication. There is also a growing demand to communicate data in a similarly flexible (wireless) fashion, and at speeds comparable to that offered by the wired broadband modems in office or at home. Reasonable internet access requires several hundred kbps (kilo-bit per second) peak rate for download, while video and picture transfer services require bit rates between a few tens of kbps to about 2 Mbps (mega-bits per second) [3]. The third-generation (3G) technology is the wireless industry’s answer to this high-bandwidth communication challenge. Wideband CDMA is one standard within the 3G framework. The advancement in wireless services has posed stiff challenges to RF IC designers to derive cost effective, small form factor and power efficient frontend
  24. 24. 3 solutions. This dissertation focuses on the optimal design of a 3G WCDMA SiGe BiCMOS handset transmitter IC (TxIC). This introductory chapter will provide the background for the research. To begin with, we will explore the wireless evolution and put the latest 3G WCDMA standard into perspective. It will be followed by a review on the handset transmitter functions and the corresponding 3G specifications. Subsequently, the basics of SiGe BiCMOS, which is the process technology for this transmitter IC development, will be provided. We will conclude this chapter by presenting the objectives and the organization of the dissertation. 1.1 3G Wireless System and Wideband CDMA 1.1.1 Analog 1G and Digital 2G Cellular Telephony arrived in North America in 1983 with the rollout of the Advanced Mobile Phone System (AMPS) [2]. Referred to as a first generation (1G) system, it employed analog methods, in which voice signals are superimposed onto the radio frequency (RF) carrier using frequency modulation (FM). To share the limited spectrum among multiple mobile phone users, frequency division multiple access (FDMA) was employed. This channel allocation scheme is straightforward as shown in Figure 1.2(a). A user is assigned one of the (for instance, 30 kHz) channels exclusively within the available spectrum to make the call.
  25. 25. 4 By offering the new-found freedom of mobile communication, the deployment of the 1G system enjoyed great success. Demand for the service was very high, exposing the system’s weakness of inadequate capacity. Other drawbacks of this analog-based scheme included relatively poor call quality, limited coverage and low security (problem of eavesdropping) [2]. To mitigate that, second generation (2G) systems employing digital technology were deployed in the late 1980s. Message signals are digitally encoded before being superimposed onto the RF carrier. As a result, powerful digital coding techniques can be utilized to improve voice quality and boost immunity to channel noise and interferences. Moreover, time division multiple access (TDMA) is applied such that each channel was divided into time slots. Multiple simultaneous conversations can take place at the same RF channel on a time-sharing basis, as shown in Figure 1.2(b). The channel capacity of the 2G system was thus significantly higher than its ancestor (where each channel is dedicated to a single conversation). Examples of 2G system include North American Digital Cellular (NADC) [4] introduced in the U.S. in the late 1980s, and the Global System for Mobile Communication (GSM) in Europe [5] in the early 1990s.
  26. 26. 5 time time Power Power frequency frequency (a) (b) Figure 1.2 Comparison of (a) FDMA and (b) TDMA concepts. 1.1.2 Vision and Evolution of 3G In the 1990s, ITU (International Telecommunications Union) worked on the vision of defining a future third generation (3G) wireless framework known as IMT-2000 (International Mobile Telecommunications-2000). Its objectives are global coverage and a significantly enhanced data rate (over the 2G systems to support broadband services such as internet access or multimedia communication). The target data rate for stationary users is 2.048 Mbps. For the pedestrian and the vehicular user, the data rates should reach 384 kbps and 144 kbps, respectively [6]. The evolution from 2G to 3G begins with the creation of robust, packet-based data services from a pure circuit-switched-voice system [7][8]. Packet switched communication is provided to ensure efficient resource usage for data transmission that are bursty in nature. For example, based on the (2G) GSM standard which has a slow data rate of 9.6-14.4 kbps, the packet mode extension is called General Packet Radio Service (GPRS) [9]. Higher data rate is provided since GPRS can allocate multiple time slots in parallel to a user. The assigned number of time slots is adaptive
  27. 27. 6 to the network usage: it can be reduced in case of scarcity of resources for voice service. GPRS service can also flexibly handle asymmetric services by allocating different numbers of time slots in the up-link (that is, from the mobile phone user to the basestation) and down-link (from basestation to user). The maximum data rate is 171.2 kbps in theory, and 20/30 kbps in practice. Since 3G services start at 144 kbps (vehicular user) as described earlier, some service providers called their GPRS implementations 2.5G to differentiate it from their 2G offerings. As the second transitional step to 3G, Enhanced Data rates for GSM Evolution (EDGE) [10] increases the gross bit rate by applying enhanced modulation schemes with improved spectral efficiency. The modulation format is the 8-phase shift keying which transmits 3 bits per symbol (instead of the Gaussian minimum shift keying (GMSK) employed for GSM that transmits 1 bit per symbol). Data rate up to 384 kbps can be achieved, which reaches the pedestrian user rate of the 3G target. 1.1.3 Wideband CDMA Wideband CDMA (WCDMA) is the ultimate 3G destination of the GSM evolution. It is selected by the European Telecommunications Standards Institute 1 (ETSI) for 1 Although widely adopted in Japan and Europe, WCDMA represents only one version of the 3G wireless standards. While the main purpose of IMT-2000 was to standardize worldwide allocation and use of radio spectrum (a process known as “harmonization” to facilitate global roaming), there exist five major (competing) systems within the framework [12][13] at the end due to intense political and vendor lobbying [14]. In particular, WCDMA should not be confused with the cdma2000 standard [16] in the U.S. Although both are based on the CDMA technology, cdma2000 has different modulation and
  28. 28. 7 wideband radio access to support 3G multimedia service [11]. The data networking for WCDMA is based on GPRS/ EDGE. As a result, WCDMA service can be integrated with the existing GSM core network cost-effectively. It adds the ability to handle 2 Mbps data rate by making use of wide-bandwidth channels of 5 MHz. The transmit band occupies 1920-1980 MHz, while 2110-2170 MHz is reserved for receive band in frequency division duplex (FDD) operation. WCDMA employs code-division multiple access, or CDMA, (in oppose to the FDMA or TDMA described before) to distinguish between users who share the common transmission medium [16]. At the transmitter side, each user’s message signal is encoded by a unique (orthogonal) code sequence, which is composed of pseudo-random bits (known as “chips”) running at a much higher rate than the information being sent. Since the bandwidth of the code signal is much larger than that of the message, the encoding process “spreads” the signal spectrum. The encoded message signal will share the same frequency (channel) with other users at the same time, as shown in Figure 1.3. This is to contrast with the other two multiple access schemes shown in Figure 1.2. spreading schemes [17], and it adopts a different evolutionary path from its 2G IS-95 (also known as cdmaOne) ancestor [11][15].
  29. 29. 8 time Power frequency Figure 1.3 The CDMA concept. At the receiver side, the received signal will be correlated with a synchronously- generated replica of the spreading code. (This implies that the receiver has knowledge of the modulating code the transmitter applies.) Assuming the cross-correlations between the code of the desired user and the code of other users are small (or the spreading codes are orthogonal), the receiver will “despread” the signal of the desired user, while the signals from other users will stay spread and appear as background noise. As a result, within the information bandwidth, the power of the desired user will be much larger than that of the other users, as shown in Figure 1.4. The desired signal can be readily extracted. Notice that for similar reasons, the spread-spectrum modulation is also robust against interferences or jamming signals.
  30. 30. 9 user 1 user 2 + user 1 jammer ω jammer W1 ( t ) t ω ω users 1 & 2 user 2 ω W1 ( t ) t W2 ( t ) t transmitters Air interface receiver Figure 1.4 Principle of spreading and despreading in CDMA. CDMA is more susceptible to the “near-far” problem than its FDMA or TDMA counterparts [18][19]. A weak received signal from a far-away user can be totally overwhelmed by a strong signal from a nearby user. Since the strong signal will raise the noise floor upon despreading, detection of the desired weak signal is greatly degraded. To mitigate that, CDMA transmitters must feature relatively wide and accurate power control (or specifically, signal attenuation capability) to ensure that the signal levels presented to the basestation receiver are roughly equal (for instance, within 1 dB of each other). In summary, Table 1.1 compares the key air interface specifications for WCDMA to its 2G and 2.5G ancestors. As will become evident in subsequent chapters, the wide-bandwidth variable-envelope WCDMA signal, as well as the wide
  31. 31. 10 gain control range mandated for the system, will have major impacts on the RF frontend architecture and circuit design. Table 1.1 Comparison of wireless standards: GSM, GPRS, EDGE and WCDMA. GSM GPRS EDGE WCDMA Generation 2G 2.5G 2.5G 3G Uplink Freq. (MHz) EGSM: 925-960, DCS:1805-1910 1920-1980 Downlink Freq. (MHz) EGSM: 880-915, DCS: 1710-1785 2110-2170 Channel BW (MHz) 0.2 0.2 0.2 5 Multiple Access TDMA TDMA TDMA CDMA Duplexing Frequency Division Duplexing QPSK (with Modulation GMSK GMSK 8-PSK Hybrid PSK spreading) Signal envelope Constant Constant Variable Variable Power control range Small (about 25 dB) Wide (>74 dB) Data Rate (kbps) 9.6 – 14.4 171.2 384 2048 1.2 Transmitter IC for WCDMA Handset As traditional low-data-rate voice-centric handsets evolve to advanced high-data-rate feature-rich “smart” phones, the mobile radio design sees a substantial increase in complexity [1]. But as the 3G wireless system gains popularity, there is also an enormous pressure to reduce the size, cost and power consumption of the mobile phone chipset [20][21]. While the digital baseband part has experienced tremendous power saving and functionality enhancement due to the progress of deep submicron
  32. 32. 11 technologies, the analog/RF sections of the mobile radio remain the bottleneck in achieving a low-power high-performance solution. This dissertation focuses on the innovative design of the transmitter IC (TxIC), a key RF component on the 3G WCDMA handset solution [22]-[35]. The TxIC contributes significantly to the evaluation of part count (which translates to cost), size and the battery life of the final handset solution. 1.2.1 Transmitter IC Fundamentals The TxIC is located between the digital signal processor (DSP) and the power amplifier (PA) as shown in Figure 1.5. Interfacing between the digital and the analog/RF domains, it faithfully translates the baseband data into a format suitable for transmission to the basestation. Specifically, the translation operation entails: (1) quadrature modulation of baseband data, (2) up-conversion to the radio frequencies, and (3) power control. (Notice that the distinctions are made only for the sake of conceptual clarity; these functions, especially the first two, are often achieved simultaneously.) These concepts are discussed below [18]. this work Duplexer transmitter SAW PA DSP receiver SAW Figure 1.5 Block diagram of a cellular handset, showing the position of the TxIC.
  33. 33. 12 WCDMA system employs QPSK (quadrature phase shift keying) as its uplink (from handset to basestation) modulation scheme [39]. The in-phase and quadrature- phase baseband signals 2, xI ( t ) and xQ ( t ) , are impressed upon a single carrier (of radian frequency ωc ) according to xQPSK ( t ) = xI ( t )cos( ωc t ) + xQ ( t ) sin( ωc t ) (1.1) This operation is accomplished by the quadrature (I/Q) modulator as shown in Figure 1.6. Two mixer circuits are employed. The modulator is a direct up-converter that transforms the (5 MHz wideband spread) spectrum of each baseband signal to the (intermediate-frequency IF, or the RF) carrier frequency. Ideally, it suppresses the carrier signal ( cos( ωc t )), and preserves the orthogonal signal relationships. cos(ωct) xI(t) Σ xQPSK(t) xQ(t) sin(ωct) Figure 1.6 Conceptual diagram of the quadrature modulator. 2 To tighten the bandwidth of the modulated spectrum, and to achieve Nyquist signaling for zero inter- symbol interference (ISI) [36], the baseband data xI ( t ) and xQ ( t ) are generated by pulse-shaping the symbols on a HPSK constellation [37] by a root-raised-cosine filter with α = 0.22 [39].
  34. 34. 13 In practice, however, the accuracy of the I/Q modulation (or the quality of the transmit signal) is plagued by LO leakage and I/Q leakage (imperfect carrier signal orthogonality) [38]. These nonideal effects can be explicitly incorporated into (1.1) to give: ⎛ ΔA ⎞ xQPSK ( t ) = ( xI ( t ) + xI ,dc ) ⋅ ⎜1 + ⎟ ⋅ cos( ωc t + Δθ ) + ( xQ ( t ) + xQ ,dc ) ⋅ sin( ωct ) nonideal ⎝ A ⎠ (1.2) where xI ,dc , xQ ,dc denote the dc offsets associated with the baseband data, while ΔA A , Δθ represent the gain and phase mismatches between the I and Q channels, respectively. The dc offset can be caused by device mismatches at the analog baseband circuits (before the quadrature modulator) as well as within the mixer circuits. Because of them, a portion of the carrier signal appears at (or leaks to) the output of the mixer. On the other hand, the I/Q leakage is due to the gain and phase imbalances between the quadrature local oscillator (LO) carrier signals (as well as the mixer circuits). As a result, the outputs of the mixers are not orthogonal and actually corrupt, or spill into, each other. The leakage power can be found by [19]: Pleakage 2 − 2 1 + ΔA A ⋅ cos Δθ + ΔA A ≈ (1.3) Pdesired 2 + 2 1 + ΔA A ⋅ cos Δθ + ΔA A For instance, gain and phase mismatches of 2% and 2o respectively would cause an I/Q leakage of -35 dBc.
  35. 35. 14 In general, an ideal up-conversion mixer produces an output whose amplitude is proportional to the input signal only. The output should be independent of the LO signals. In fact, for noise and gain reasons, it is very desirable to drive the mixers with square waves (instead of sinusoids) LO’s, and operate the mixers as on-off switches (instead of multipliers) [18]. Square waves have strong odd harmonics and somewhat significant even harmonics if the duty cycle is not exactly 50%. Due to the spectrally- rich LO’s and, and to a lesser extent, the harmonic and intermodulation distortions of the mixer circuit itself, mixing products (spurs) will appear at frequencies given by f spur = m ⋅ f LO ± n ⋅ f IF (1.4) where f LO denotes the LO frequency, f IF the input signal (intermediate) frequency, and m, n are integers ranging from 0 to +∞ . Assuming the up-conversion employs low-side injection, the desired output is given by f LO + f IF (that is, m = n = 1 ). All other combinations of ( m,n ) denote undesirable spurious emissions, which should be minimized to prevent polluting the airwaves where a multitude of transmissions (of different wireless standards) co-exist. In practice, the amplitudes of the spurs decrease as m or n increases. For example, strong LO leakage would appear at f LO ( m = 1,n = 0 ). It is usually suppressed by employing a doubly-balanced (Gilbert) mixer architecture [18]. Besides, an undesirable sideband output, which has equal amplitude as the desirable one, appears at f LO − f IF (at equal distance from the LO frequency on the opposite
  36. 36. 15 side). The sideband can be eliminated by a discrete RF surface acoustic wave (SAW) filter, which is appropriately known as the image-reject filter. For an integrated solution, the single-sideband (SSB) mixer architecture [18] of Figure 1.7 can be employed. cos(ωct) xIF(t) Σ XRF(t) 90o sin(ωct) Figure 1.7 Conceptual diagram of an up-conversion single-sideband mixer. Before we leave this section, let’s investigate a key QPSK signal property that has crucial influence on the transmitter (and in particular, the RF amplifier) circuit design. From (1.1), the QPSK-modulated waveform is equivalently written as xQPSK ( t ) = A( t )cos[ ωc t + θ( t )] (1.5) where ⎛ − xQ ( t ) ⎞ A( t ) = xI2 ( t ) + xQ ( t ) & θ( t ) = tan −1 ⎜ 2 ⎟ (1.6) ⎝ xI ( t ) ⎠ As shown in (1.6), the envelope signal A( t ) is signal-dependent. In other words, QPSK is a “variable-envelope” (linear) modulation scheme. Circuit linearity is of paramount importance to preserve the information integrity. Besides, circuit
  37. 37. 16 distortions will spread the frequency spectrum of the variable-envelope signal to adjacent channels. Known as “spectral regrowth”, this phenomenon is detrimental to system capacity. The linearity requirement is usually the most stringent for the RF amplification stage (or the PA driver located at the end of the TxIC path), which handles the highest signal level. This inevitably translates to relatively inefficient amplifier designs. The design of high-linearity high-efficiency RF amplifier is further complicated by the need of power control, or the very wide range of signal levels the amplifier will handle. The amplifier should produce high average (not just peak) efficiency, which takes the statistical signal power distribution into account. Based on the understanding of the transmitter system fundamentals, we can now move on to describe the handset transmitter specifications set forth by the WCDMA standardization body. 1.2.2 WCDMA Transmission Specifications The WCDMA handset transmission specifications are given in [39], which is available on the 3rd generation Partnership Project (3GPP) website [40]. Note that the performance requirements are defined for the entire transmitter path up to the antenna, while the TxIC is only one of the contributing components. Therefore, the TxIC should be designed with good safety margins so that when additional impairments are introduced further along the path (most noticeably, by the PA), system requirements are still met. Key performance metrics pertaining to the TxIC design are highlighted and explained below.
  38. 38. 17 To combat the near-far problem, closed-loop control of the transmitter output power must be implemented as described earlier. WCDMA User Equipment (or the handset) Power Class 3 targets a maximum transmission power level of +24 dBm, and a minimum of -50 dBm, at the antenna. This corresponds to a very wide power control range of 74 dB. Since it is not cost-effective to build a variable-gain PA, the power control range will be realized totally by the TxIC. To account for process, supply and temperature variations, most manufacturers implement close to 90 dB of dynamic range into their TxIC’s [26]-[32],[34]-[35]. On the other hand, typical WCDMA PA’s feature power gain around 25 dB [30],[41]-[43]. Therefore, the TxIC should furnish a maximum output power of about +5 dBm to meet the maximum transmission power level (while accounting for additional insertion losses of approximately 2 to 3 dB due to, for example, the duplexer filter). The linearity of the transmitter is specified in terms of Adjacent Channel Leakage Ratio (ACLR). A measure of spectral regrowth, ACLR is the ratio of the power measured in the adjacent channel to the transmitted power as shown in Figure 1.8. The maximum allowable ACLR at 5 MHz offset (for first adjacent channel) and 10 MHz offset (for alternative adjacent channel) are -33 dBc and -43 dBc, respectively. These levels must be maintained as long as the adjacent channel power is greater than -50 dBm. To provide a safety margins for the PA distortions, the ACLR of the TxIC should be at least 10 dB better than minimum requirements, and equal -43 and -53 dBc at 5 and 10 MHz offsets, respectively.
  39. 39. 18 0 −10 Adjacent channel leakage transmit channel −20 Spectrum in dBm −30 Alternative −40 channel leakage −50 5 MHz −60 bandwidth −70 1935 1940 1945 1950 1955 1960 1965 Frequency in MHz Figure 1.8 A sample plot of measured spectral regrowth. The shape of the RF transmission spectrum is further governed by the Occupied Bandwidth and the Spectral Emission Mask requirements. The first requirement specifies that at least 99% of the transmitted power must fit within a 5 MHz bandwidth at the chip rate of 3.84 MHz. The second requirement defines the maximum tolerable unwanted emissions immediately outside the nominal channel between 2.5 MHz and 12.5 MHz offset from the center carrier frequency. (The power of emission is measured in 30 kHz bandwidth if it is between 2.5 to 3.5 MHz offset frequency, and 1 MHz in the 3.5 to 12.5 MHz region. The out of channel emission is specified relative to the channel power measured in a 3.84 MHz bandwidth.) These emissions are caused by the modulation process and transmitter distortion, and should not be confused with the spurious emissions caused by up-conversion process. The spectral emission mask requirement is graphically displayed in Figure 1.9.
  40. 40. 19 10 0 Spectral mask in dBc/BW Measurement bandwidth (BW): 3.84 MHz 30 KHz 1 MHz (over this region) −10 −20 spectral emission mask specs. −30 −40 −50 −60 0 2 2.5 3.5 6 8 9 10 12.5 Frequency offset from carrier (MHz) Figure 1.9 Spectral emission mask specifications. The transmitted waveform quality, or the modulation accuracy, is represented by the performance metric known as root-mean-square (rms) Error Vector Magnitude (EVM). Error vector is defined as the displacement of the actual measured symbol from its theoretical constellation position, as shown in Figure 1.10. RMS EVM is given by the square root of the ratio of the mean error vector power to the mean reference signal power expressed as a percentage. It shall not exceed 17.5 % for output power levels greater than -20 dBm. Typically, about 5 to 10 % of EVM is budgeted for the TxIC.
  41. 41. 20 Q ΔA Measured signal Error vector ΔA = I/Q magnitude Δθ mismatch error Ideal signal (reference) Δθ = I/Q phase I mismatch error Figure 1.10 Illustration of error vector and the related parameters. As mentioned earlier, spurious emissions are caused by frequency up-conversion products, circuit harmonic and intermodulation products, as well as circuit noise. They must be minimized to avoid degrading the sensitivity of the WCDMA receiver, or “jamming” nearby receivers operating at different standards. These limits are summarized in Table 1.2, which defines general and additional spurious emission requirements in terms of the output power (dBm) over the respective measurement bandwidth. The design criteria given in [31] are also adopted. Since the specifications are specified at the antenna, proper adjustments, such as those to be described in Section 2.3, should be made when evaluating whether the TxIC is meeting the spurious emission requirements.
  42. 42. 21 Table 1.2 Spurious emission requirements for WCDMA handsets. Frequency Measurement Minimum Frequency bandwidth bandwidth requirement band 9 - 150 kHz 1 kHz -36 dBm General 0.15 - 30 MHz 10 kHz -36 dBm spurious emissions 30 - 1000 MHz 100 kHz -36 dBm [39] 1 - 12.75 GHz 1 MHz -30 dBm 1893.5 - 1919.6 MHz 300 kHz -41 dBm PHS Additional Spurious 925 - 935 MHz 100 kHz -67 dBm EGSM emissions [39] 935 - 960 MHz 100 kHz -79 dBm GSM 1805 - 1880 MHz 100 kHz -71 dBm DCS Rx 1920 - 1980 MHz 1 MHz -25 dBm WCDMA Tx Other 2110 - 2170 MHz 3.84 MHz -120 dBm WCDMA Rx [31] 1710 - 1785 MHz 100 kHz -49 dBm DCS Tx The key 3GPP WCDMA transmission requirements and the TxIC budgets are summarized in Table 1.3. Measured performances of ten TxIC 3 [26]-[35] are also presented alongside for reference purposes. The measured data match quite closely to the TxIC design budgets discussed earlier, which support our analysis. 3 These ten TxIC’s are among the most advanced and highly-integrated solutions reported today. (On the other hand, for conciseness purpose, the chips that only integrate the IF section [22]-[25] are omitted in the comparison.) They represent a rich sample of architecture and circuit design techniques, and are implemented in different silicon processes. Further comparisons (including the TxIC of this research) will be made in subsequent chapters when appropriate.
  43. 43. 22 Table 1.3 Summary of WCDMA handset transmission specifications, and measured TxIC performances of published work [26]-[35]. ACLR ACLR Occupied Specifications/ Pout Gain EVM @ 5MHz @ 10MHz BW Institutions [ref.] (dBm) (dB) (%) (dB) (dB) (MHz) 3GPP Specs. +24 74 -33 -43 5 17.5 TxIC Budget ~ +5 90 -43 -53 4.5 5-10 Mitsubishi [26] +7 89.9 -47.6 -68.2 4.2 6.3 IBM [27] +7 95 -49 N/A N/A 6.3 Mitsubishi [28] +7 90.5 -45.6 -62.4 4.3 N/A TI [29] +6 > 90 -43.7 -61 N/A 6 Philips [30] +5.5 81 -44.4 N/A N/A N/A IBM [31] +3 115 -47 -65 N/A 2.45 Swiss ETH [32] -8 78 N/A N/A N/A 3.2 Seoul Nat. U. [33] +6 50 -38 N/A N/A N/A Swiss ETH [34] +2.5 100 -38 -64 N/A 4.3 Qualcomm [35] +10 > 90 ~ -55 N/A N/A N/A To meet the stringent RF performances mandated by WCDMA standard cost effectively, the TxIC of this research will be implemented on the SiGe BiCMOS process, as discussed in the next section. 1.3 SiGe BiCMOS Process Performance, cost and time-to-market are the three critical factors influencing the choice of technologies in the competitive RF industry [19]. For the handset RF
  44. 44. 23 frontend design in particular, a process’s performance is judged mainly by the speed, linearity, noise and breakdown voltage properties of the transistors, the degree of substrate isolation (or the availability of any specialized inter-device structures to that effect), as well as the portfolio of passive elements it offers (which include, for instance, high-linearity metal-insulator-metal (MiM) capacitors and high-Q metal spiral inductors). Cost is dictated by the technology’s fabrication process and yield, and the level of integration it supports. In that regard, the compound (III-V) technologies such as GaAs or InP serve the high-cost low-integration (but the highest speed and power) space, while the conventional Silicon (Si) processes, especially the digital CMOS, serve the other end. Time-to-market is closely related to the process maturity, accuracy of its device model at the intended speed of operation, and sophistication of the supporting design tools and library. Silicon-Germanium (SiGe) BiCMOS technology has a unique appeal to the wireless marketplace by offering the high performances of III-V heterojunction bipolar transistors (HBT’s), but with the integration (and cost) benefits of conventional silicon processes [44]. The first standard high-volume SiGe chip was introduced by IBM Microelectronics (Fishkill, NY and Burlington, VT) in October, 1998 [45]. Since then it has been adopted by a wide range of companies for a wide variety of applications. Our TxIC research will be conducted on IBM’s 6HP (0.25 μm) SiGe BiCMOS process [46], which is the second lithography generation of technology offering. The process’s performances and integration level are important enabling
  45. 45. 24 factors for the TxIC architecture and circuit innovations, and the process’s maturity helps to yield the first-pass silicon success on the experimental prototype. 1.3.1 SiGe HBT Basics While silicon-based IC’s are superbly manufacturable, silicon is hardly the ideal semiconductor because of its low carrier mobility and saturation velocity (as compared to the III-V compounds). However, silicon’s speed can be vastly increased if strained silicon-germanium alloy, whose energy bandgap is smaller than that for silicon, is applied to “bandgap-engineer” the silicon material system [47]. Using an epitaxial growth technique such as UHV/CVD 4, films of the SiGe alloy can be deposited on the base region of a conventional bipolar junction transistor (BJT) as shown in Figure 1.11. The p-SiGe base thus creates heterojunctions at the emitter-base (EB, n+-Si/p- SiGe) and the base-collector (BC, p-SiGe/n-Si) junctions, hence the name Heterojunction Bipolar Transistor (HBT). 4 UHV/CVD stands for ultrahigh vacuum chemical vapor deposition [49]. Apart from this step, the HBT device is essentially identical to conventional silicon BJT, and is built with processing equipment common to any advanced silicon fabrication facility. For example, the 6HP process is manufactured using standard 200 mm silicon CMOS production tooling [46]. Therefore, the SiGe BiCMOS process can enjoy the same low-cost and high-volume characteristics of other conventional CMOS technologies.
  46. 46. 25 B E C SiGe (a) (b) Figure 1.11 (a) Schematic device cross section of a SiGe HBT, and (b) the micro- photographic view [48]. The germanium content is compositionally graded from low concentration at EB junction to high concentration at the BC junction. This results in the energy-band diagram as shown in Figure 1.12. It consists of a finite band offset at the EB junction [ ΔEg ,Ge ( x = 0 ) ] as well as the larger band offset at the BC junction [ ΔEg ,Ge ( x = Wb ) ]. The position dependence of the band offset (with respect to Si) is conveniently expressed as a bandgap grading term: Figure 1.12 Energy band diagram of a graded-base SiGe HBT compared to a Si BJT.
  47. 47. 26 ΔEg ,Ge ( grade ) = ΔEg ,Ge (Wb ) − ΔEg ,Ge ( 0 ) (1.7) This position-dependent conduction band edge induces an electric field in the device, which rapidly accelerates injected minority carriers (electrons) as they traverse the base. The base transit time ( τb ), as compared to an identically constructed Si BJT, is reduced according to [50]: τb ,SiGe 2 ⎛ kT ⎞ ⎡ − ΔE 1 − e g ,Ge ( grade ) kT ⎤ = ⋅⎜ ⎟ ⋅ ⎢1 − ⎥ (1.8) τb,Si η ⎜ ΔEg ,Ge ( grade ) ⎟ ⎣ ΔEg ,Ge ( grade ) kT ⎦ ⎝ ⎠ ⎢ ⎥ where η = Dnb ( SiGe ) Dnb ( Si ) accounts for the difference between the electron and hole mobilities in the base. For RF applications, an important figure of merit for transistor speed is the unity (current) gain cutoff frequency ( fT ), which is given by −1 ⎡ 1 ⎤ fT ≈ ⎢ ( Ceb + Cbc ) + τb ⎥ (1.9) ⎣ gm ⎦ where g m is the transconductance ( I C VT ), and Ceb , Cbc are the EB and BC junction capacitances, respectively. The smaller transit time (minority carrier traverse more speedily across the base) of HBT explains its substantial speed advantage in terms of the increased fT . For handset transceiver design where low power consumption is of paramount importance, one can advantageously operate the SiGe HBT at a frequency below the peak fT with a significantly reduced bias current. This frequency-power dissipation tradeoff is illustrated in Figure 1.13.
  48. 48. 27 Figure 1.13 SiGe HBT, whose fT is inherently higher than that of silicon for the same bias current, can trade off the excess speed to achieve a low-power solution. Beside its speed advantage, HBT can also furnish a substantially higher current gain ( β ). It is because the bandgap reduction at the EB junction lowers the potential barrier, so more electrons will be injected from emitter to base (or higher collector current will result) for a given voltage bias. For applications (such as the handset TxIC design) where high β is not particularly important, the process can tradeoff the HBT’s excess β for lower base resistance ( rb ) by doping the base region more heavily. This would very advantageously lower the broadband noise of the device, and increase the unity power-gain (or maximum oscillation) frequency, f max according to fT f max = (1.10) 8πCbc rb The introduction of the graded SiGe alloy also increases the Early voltage ( VA ) of the resulting HBT. Physically, as the base profile is more heavily weighted towards the collector region, base region becomes harder to deplete when the collector-base
  49. 49. 28 voltage is increased. The higher VA translates to the higher output resistance of the HBT, which is very beneficial for analog (or in our case, the mixed-signal part of the TxIC) design. The other key process issue for RF applications is the breakdown voltage of the device, which influences the dynamic range of operation. The HBT device is fundamentally limited by avalanche multiplication in the collector-base region [51]. Nevertheless, breakdown voltage of HBT is typically higher than that of the MOSFET at a given fT , which is caused by hot electron degradation of threshold voltage [52]. This makes HBT device attractive for the TxIC design, where a high output power level is delivered. 1.3.2 IBM 6HP Process The high-performance HBT is of little use for the wireless frontend space if the process does not integrate a menu of high-quality passive elements and fine-geometry CMOS transistors. The ideal technology, as well as the tool set that accompanying it, must support building monolithic analog/ RF building blocks with the ultimate goal of integrating the entire radio on a chip [52]. The BiCMOS 6HP process [46][53] is a versatile process integrating a 47 GHz SiGe HBT with a 2.5 V, 0.25 μm (0.18 um effective gate length) CMOS base. Two versions of HBT’s are incorporated: a standard high-speed (pedestal) device, and a high (break-down) voltage device with a modified collector. Two versions of
  50. 50. 29 complementary MOSFET devices are provided: a standard 2.5 V 0.25 μm FET (with 5 nm gate-oxide), and a high-voltage FET (3.3 V, with 7 nm gate-oxide) for use in I/O circuits and analog designs. It offers five levels of metal for layout flexibility. In addition, the process features a nitride dielectric for linear MiM capacitors [54] (with high capacitance-to-area ratio), and a top thick (analog) metal for high Q spiral inductors [55]. The substrate also plays a crucial role on the RF frontend design [52]. For our TxIC design in particular, undesired spurious signals (such as digital switching noise, or harmonics of LO) can capacitively couple into the conductive substrate and corrupt the transmitter output. The 6HP process offers a deep trench structure, as well as the conventional (p+/n-well) guard rings, for improved isolation. A summary of 6HP process parameters is given in Table 1.4 [46]. To demonstrate the degree of pervasiveness of the SiGe BiCMOS in the 3G WCDMA TxIC space, we compare the technologies employed by the ten published TxIC works in Table 1.5. Six out of the ten TxIC’s are implemented in various versions of SiGe. If only commercial projects are considered (that is, [26]-[31],[35]), six out of seven chips are SiGe BiCMOS. The overwhelming majority of SiGe BiCMOS implementation clearly demonstrates the popularity of the process for handset transmitter frontend applications.
  51. 51. 30 Table 1.4 Summary of IBM’s 6HP SiGe BiCMOS process parameters. SiGe HBT NPNs HIGH-SPEED DEVICE HIGH-VOLTAGE DEVICE Beta 100 88 fT (Vcb=1V) 47 GHz 27 GHz fmax 65 GHz 55 GHz Early voltage 75 V 180 V BVceo 3.35 V 5.4 V FETs NFET 2.5 V PFET 2.5 V NFET 3.3 V PFET 3.3 V Tox 5.0 nm 7.0 nm 5.0 nm 7.0 nm Leff 0.18 μm 0.26 μm 0.18 μm 0.265 μm IDsat 595 μA/ μm 580 μA/ μm 280 μA/ μm 285 μA/ μm Capacitors MOS Cap 3.10 fF/μm2 MiM Cap 0.70 fF/μm2 Resistors Polysilicon 1 & 2 3600 Ω/ & 210 Ω/ Silicon 1 & 2 100 Ω/ & 63 Ω/ Spiral Inductors 0.28 - 83 nH, with outer dimension 100 – 450 μm
  52. 52. 31 Table 1.5 List of process technologies employed by the published TxIC works [26]-[35]. Institutions [ref.] Process Lithography (μm) Supply (V) Mitsubishi [26] SiGe BiCMOS 0.5 3.0 IBM [27] SiGe BiCMOS 0.5 3.0 Mitsubishi [28] SiGe BiCMOS 0.25 3.0 TI [29] SiGe BiCMOS 0.3 2.7 Philips [30] BiCMOS 0.25 2.6 – 3.0 IBM [31] SiGe BiCMOS 0.25 2.85 Swiss ETH [32] CMOS 0.25 2.5 Seoul Nat. U. [33] CMOS 0.35 3.3 Swiss ETH [34] CMOS 0.13 1.5 Qualcomm [35] SiGe BiCMOS 0.4 2.7 – 3.0 1.4 Dissertation Objectives and Organization This dissertation presents an innovative SiGe BiCMOS transmitter IC for 3G WCDMA handset applications. The two design objectives are (1) high level of integration, (2) and low power consumption, as explained below: Existing TxIC solutions commonly require external filters at the intermediate frequency (IF) for spurious rejection [22]-[29]. While being a time-proven approach, those off-chip components (for instance, IF SAW or LC tank) are bulky and expensive. Their successful elimination would substantially reduce the feature size and
  53. 53. 32 cost of the final cell phone product. Therefore, it is obvious that a highly-integrated TxIC is very desirable. However, one may question the necessity of a low-power TxIC solution, especially in the presence of a presumably far more power-hungry PA. As explained earlier, the WCDMA system features a wide dynamic range power control function, to combat the “near-far” problem. Although the PA can consume a high current at the peak output level, the power consumption drops substantially during the power backoff mode (due to its Class AB bias) [56]. This is shown in Figure 1.14. Moreover, at the highest probability output power, as shown by the 0 dBm point of Figure 1.14, the PA can consume less power than a typical TxIC. This makes the TxIC the major determinant of the overall average transmit power efficiency. As a result, a carefully-designed low-power TxIC (as shown by the broken line in Figure 1.14) is crucial to prolong the battery life. 5 600 CDMA Development 4 Group (1997) Probability (%) PA 400 Idc (mA) 3 2 typical TxIC 200 1 0 desired TxIC 0 -30 -20 -10 0 10 20 30 Pout (dBm) Figure 1.14 Current consumption of PA and TxIC versus the transmitter output power, and the output power probability distribution function. A poorly designed TxIC can substantially reduce overall transmitter efficiency.
  54. 54. 33 The highly-integrated low-power TxIC is achieved through a combination of architecture and circuit innovations. The dissertation is organized as follows: Chapter 2 presents the highly integrated TxIC architecture. We will begin with a thorough review of the existing TxIC solutions to illustrate the issues faced by WCDMA transmitter architecture design. We will then introduce the improved transmitter architecture based on the digital IF scheme. Two key features (namely the optimal frequency plan and the special-purpose high-order-hold D/A conversion) are developed to enhance the level of integration and to reduce circuit complexity. System-level simulation results will be produced to establish that the WCDMA spurious-emission requirements are met with virtually no dedicated IF filters. Chapter 3 describes the low-power TxIC circuits, which include the digital-to- analog converter (DAC), the single-sideband (SSB) mixer, and the RF variable-gain amplifier (RFVGA). The design techniques for the three subsystems will be explained in detail. The DAC employs a capacitor divider network to simultaneously achieve low-power consumption and high-speed conversion. The mixer and the amplifier employ adaptive biases to minimize the quiescent power consumption and to provide current boost only when needed. For each case, experimental results are furnished to demonstrate the circuits’ performances and practicality. Chapter 4 analyzes the linearity of the RF amplifier (of the previous chapter) meticulously, using the Volterra technique. It will be shown that the amplifier’s linearity (in terms of intermodulation distortion) can be dramatically improved by
  55. 55. 34 optimally injecting the envelope signal (which is generated by the adaptive bias control circuit) back into the main bias network. The analysis is confirmed by comparing the theoretical predictions to simulation and experimental results. Chapter 5 provides the measured results of the complete TxIC. Key system-level performance metrics, such as spurious emissions, LO and sideband leakage, ACLR, and EVM will be presented and discussed. The level of integration and the power consumption of this work will be compared to other state-of-the-art solutions. Chapter 6 concludes the dissertation. It summarizes the architecture and circuit innovations of the WCDMA TxIC, and discusses the implications to future-generation transmitter design. Future areas of research will also be suggested.
  56. 56. CHAPTER 2 Highly-Integrated TxIC Architecture There is enormous pressure to reduce the size, cost and power consumption of mobile phones, as these qualities are strongly correlated to customer satisfaction. While the digital circuits have experienced tremendous power saving and enhanced functionalities with the progress of deep sub-micron processes, the analog/ RF sections remain the bottleneck. In this chapter, we focus on an improved WCDMA transmitter IC architecture for handset applications. Existing TxIC solutions commonly require external filters at the intermediate frequency (IF) for rejection of spurious components [22]-[29]. While being a time- proven approach, those off-chip components (for instance, IF SAW and LC tank) are bulky and expensive. They substantially increase the feature size and cost of the final cell phone product. TxIC solutions available today tend to be complicated. This is mainly due to the heterodyne architecture [22]-[29], which demands two pairs of analog/ RF mixers and synthesizers. Furthermore, the power consumption can be substantially driven up if an active IF filter is integrated [30]. 35
  57. 57. 36 A highly-integrated, simple and low-power WCDMA TxIC solution for mobile station applications is proposed. This is achieved through a novel architecture which alleviates some of the analog circuit complexities by high-speed digital signal processing. We believe this is an appealing technological direction because the resulting TxIC solution can then take full advantage of the rapid advancement of fine- geometry IC technologies. To begin with, existing TxIC architecture solutions developed by both the industry and the academia will be reviewed. This is to illustrate the issues faced by WCDMA transmitter architecture design. Then, we will introduce the improved transmitter architecture based on the digital IF scheme. The design innovations developed to enhance the level of integration and to reduce circuit complexity will be discussed in detail. System level simulations on the spurious emission will be presented, which is followed by concluding remarks. 2.1 Survey of TxIC Architectures for WCDMA Handsets A list of published WCDMA handset transmitter designs [26]-[35] is shown in Table 2.1. The architectures of the TxIC’s fall into two camps: the heterodyne or the homodyne. Their relative strengths and weaknesses are discussed below. 2.1.1 Heterodyne Transmitter Architecture The majority of commercial WCDMA TxIC’s are heterodyne [26]-[31], performing up-conversion in 2 steps similar to that shown in Figure 2.1. Baseband data are first
  58. 58. 37 up-converted by quadrature modulation to the intermediate frequency, typically at hundreds of MHz. The in-phase (I) and the quadrature-phase (Q) signals are then summed and further up-converted to the desired transmit channel by a single-sideband (SSB) mixer. Table 2.1 Comparison of WCDMA TxIC Architecture. External Num. of Expected EVM Company/ IF/RF analog performance under: Architecture Institution [ref.] filter mix/ syn I/Q LO needed? needed? mismatch leakage Mitsubishi [26] Y/Y 2/2 Good Good IBM [27] Y/Y 2/2 Good Good Heterodyne Mitsubishi [28] Y/Y 2/2 Good Good TI [29] Y/N 2/2 Good Good Philips [30] N/N 2/1 Fair Good Hetero. var. IF IBM [31] N/N 2/1 Fair Good Swiss ETH [32] N/N 1/1 Bad Bad Seoul Nat. U. [33] N/N 1/1 Bad Bad Homodyne Swiss ETH [34] N/N 1/1 Bad Good Qualcomm [35] N/N 1/1 Bad Good This work Hetero. dig. IF N/N 1/1 Ideal Good
  59. 59. 38 I DAC LPF BPF SSB LO1 90o Σ Q DAC LPF IF VGA RF VGA LO2 Figure 2.1 Block diagram of a conventional heterodyne transmitter. Among the heterodyne TxIC’s reported, different levels of transmitter functions are integrated. The designs of [22]-[25] include the IF quadrature modulator only, while the chips of [26]-[31] have both the IF and RF up-conversion sections integrated. External RF SAW filters (following the RF up-conversion) are required in the TxIC’s of [26]-[28] as no on-chip LC filtering [29] or SSB mixer [30] are featured. Some of the TxIC’s also distinguish themselves by integrating the synthesizer [22][24][25],[28]-[30]or the reconstruction filter for D/A conversion [22]. The heterodyne architecture offers many advantages. Since the frequencies of the local oscillators (LO’s) are far from the final transmit signal, injection locking [57] (i.e., the LO shifts towards the frequency of the noise injected by the strong power amplifier output) can be avoided. Also, the somewhat inevitable LO leakage would not degrade the error vector magnitude (EVM) performance because it does not overlap with the transmit signal spectrum. I and Q matching is superior (if careful design and layout practices are employed) because quadrature modulation is performed at lower (intermediate) frequencies [12]. But most importantly, the very wide gain control range of 74 dB mandated by the WCDMA standard [39] can be
  60. 60. 39 readily implemented despite of the limited substrate isolation. (In fact, to provide adequate design margin for process, supply and temperature variations, it is not uncommon to find more than 90 dB of nominal dynamic range in TxIC solutions as shown in Table 1.3). The last point is explained below. Signal isolation on a silicon substrate can be as low as 40-50 dB at radio frequencies (RF) [58]-[59], and it is impossible for a variable gain amplifier (VGA) to attenuate beyond the level of isolation. For example, an RF VGA circuit may attenuate its input by, say, 60 dB. The input signal, however, can appear at the output (reduced only by 40 dB of isolation) directly through the substrate, thus inundating the desired output. Therefore, substrate isolation dictates the maximum achievable VGA attenuation. It is clear that the gain control mandated for WCDMA transmitters cannot be carried out solely at RF. The heterodyne architecture overcomes the substrate isolation problem by effectively distributing the total gain range amongst two separate frequency bands (IF and RF). As such, the RF VGA can be designed to cover a much smaller gain control range (so that substrate isolation is no longer an issue), while the rest of the gain control can be attributed to the IF VGA (which generally experiences less severe signal coupling problem because of the lower frequency of operation). However, the heterodyne architecture is not without drawbacks. It often demands external IF filters to remove the spurious responses. These off-chip components would substantially increase the size and cost of the chipset. They also
  61. 61. 40 pose reliability issues as high-frequency signals (in the 100’s of MHz range) must now travel off-chip. Two approaches have been attempted to eliminate these external passive components. The first design [30] employs an active IF poly-phase filter. As shown in Figure 2.2(a), the IF section is fully complex. That is, the I and the Q signals will not be summed until they have been up-converted to RF. We believe that this architecture is more vulnerable to mismatch issues than other conventional heterodyne implementations because of the extended I/Q paths. Besides, the high-Q IF bandpass filter function demands ultra-wideband opamps (with open loop gain bandwidth product of 11.3 GHz). The design is non-trivial, and may noticeably increase the overall power budget. On the other hand, the design of [31] eliminates the need of the off-chip IF filter by adopting a meticulous frequency planning scheme. It is shown in Figure 2.2(b). Local oscillator frequencies are carefully selected so that they do not have a direct harmonic or sub-harmonic relation to the RF output frequency. Together with good circuit linearity and quadrature balance, the copious spurs resulting from the IF and RF up-conversions can pass the WCDMA spurious specifications with very little amount of on-chip filtering (by, say, LC tanks). The final TxIC solution requires only an absolute minimum of external filtering (namely one SAW filter between the TxIC and the power amplifier, and an antenna duplexer filter). However, we believe that this architecture is also more susceptible to I/Q mismatch problem, as will be discussed soon.

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