TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are ...
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Wireless Low Power and Verification Challenges

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Wireless Low Power and Verification Challenges

  1. 1. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.WirelessLow Power and Verification ChallengesPresented toDVClub, Austin, TxNov 20, 2006.Milind Padhye, Noah Bamford, Ken AlbinFreescale Semiconductor Inc..
  2. 2. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Wireless CarriersLow Power Design is businesscritical need and has a directimpact to carrier revenue.If the cell phone is powered off,The source of revenue is off forcarrier.Performance needed to sell thephone. Power needed to bringrevenues.
  3. 3. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Wireless and Handheld Devices►Standby & Talk time - Benchmark parameters in cell phone industry.►Music playback time - Benchmark for MP3 capable phones.►Frequent battery charging - Major negative in consumer mind.►Increase performance with large battery – Increased Cost►Increased Heat in phone – Increased liability and TCO.Power Performance ratio must be very high to win consumer mind.• End Consumers are becoming power aware and can make intelligentdecisions and smart choices on power.
  4. 4. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Trends - GSM Phone Current33956200312036206010NGage QD950066826230iN90880072607270V66V60gV600C331V180V400RAZR V3V635ROKR ELV360PEBLSGH-E400SGH-E105SGH-C225SGH-E317SGH-E730SGH-X497T68iT616P900T630K700iZ500aS710W8000501001502002503003501Q002Q003Q004Q001Q012Q013Q014Q011Q022Q023Q024Q021Q032Q033Q034Q031Q042Q043Q044Q041Q052Q053Q054Q051Q062Q063Q064Q061Q072Q073Q074Q07GSMVoiceCallCurrent(mA)33956200312036206010NGage QD950066826230iN90880072607270V66V60g V600C331V180V400RAZR V3V635 ROKR ELV360PEBLSGH-E400SGH-E105SGH-C225SGH-E317SGH-E730SGH-X497T68iT616P900T630K700iZ500aS710W80001234567891Q002Q003Q004Q001Q012Q013Q014Q011Q022Q023Q024Q021Q032Q033Q034Q031Q042Q043Q044Q041Q052Q053Q054Q051Q062Q063Q064Q061Q072Q073Q074Q07GSMStandbyCurrent(mA)GSM Talk CurrentGSM Standyby Current
  5. 5. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Leakage Current in 65nm,Major concern for Wireless Design
  6. 6. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.EnergyIt’s about Energy• Battery life is proportional to energy consumed• Energy is power consumed over time• Wireless designers must manage energyconsumption.Goal: Extend Phone Battery LifeTo extend battery life, designersmust minimize active and leakagepower.
  7. 7. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Problem Focus ViewDesign Intent Hardware support for power gating, low-power idle modes, SRPG,AWB, DVFS, DPTC, Biasing techniques at all levels.DesignVerificationBehavioral and RTL verification, Gate level verification, testbenchstyles, static and dynamic power Rule checking.Low PowerinfrastructureSupport library infrastructure with special cells. New cells andparameters for cz. Multimode/multivoltage support infrastructure.PROCESS nodeDefinitionsTransistor design, Vt Optimization, memory bitcell design.custom and reusable analog. Silicon correlation.RTL2gds, Power Integrity, Multimode synthesis, Placement, powergrid creation, analysis, power estimationDesignImplementation
  8. 8. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Low Power Design Needs►Support Low Power Design Techniques thru the entire design flowusing a single file format.• Design RepresentationAccurately define and capture the low power design intent, modes andconstraints.• Design ImplementationFloorplan and power grids.Common constraints for all tools (Synthesis, APR, timing, DFT)Design analysis tools with single power constraints.Accurate power estimation and measurements• Design VerificationVoltage oriented simulatorsVarious static power technique modeling and simulations.Silicon validation and correlation.
  9. 9. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Static Power Design►Static Power is crucial for defining standby time of cell phone.►Multiple Leakage Reduction Techniques• Active Well Biasing (AWB)• State Retention Power Gating (SRPG)• Save and Restore with power gating. (S&R PG)• Multi-Vt based design styles• Aggressive Voltage Reduction during standby mode (RV)• Device biasing.• Switches, Isolation collars and level shifters.►Static Power a big part of active power• Use switches for power mode switching.• Thermal dissipation issues in packaging.
  10. 10. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Example Leakage Reduction TechniquesC65 Leakage Reduction Example01002003004005006007008009001000Nominal RV AWB SRPG S&R PG SR/S&RPGSR/S&RPG/RVTechniquesLeakageCurrent(uA)0102030405060708090BatteryTimeIncrease(%)
  11. 11. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Multi Voltage Design Styles - DVFS►Voltage has quadratic effect on power.►In Multivoltage design Style• Unused portion of design is switched off.• Low performance portion is running at lower voltage• High performance portion is at higher voltage.►Voltage partitioning decisions are crucial and very key for powerperformance factor.►Clocking is the major challenge for multivoltage designs. Needintelligent clock tree builders.►Asynchronous protocols to enable efficient voltage partitioning.►Design is optimized for multi voltage conditions.
  12. 12. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Isolation and Percolation►Picture power managed vsnon power managed designimplementation►When a module is poweredoff, outputs will float.►These outputs can corruptthe state of receiving modules.►Modules must be isolated►A separate logic is insertedto isolate and percolate.► Logic State of isolation isimportant and can causeadverse effects if improper.Module BModule AVDDModule BModule AVDDISOController
  13. 13. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Retention Verification►A module can be turned off tosave leakage.►The state of module B must beretained during power off.►Special circuits and flipflopshave been created for thispurpose.►Need to verify• The state was saved correctly.• State restored correctly.• System can function after powerup.►The controller must ensure thecorrect save and restoresequence.Module BModule AVDDISOControllerModule BInRetentionModule AVDDISOController
  14. 14. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Voltage and Frequency Variation►Voltage of module A is reducedwhen lower performance need.►Change of voltage isassociated to change of Clock.►Isolation is now Lisolator. (levelShifter & isolation)►Need to verify• System performance state.• Prepare & communicate regardingvoltage change..• System operational during change.• System operational after change.►The controller must ensure thecorrect operating sequence andmonitor progress.Module BInRetentionModule AVDDISOControllerModule BInRetentionModule AVDDLISOController VDDX
  15. 15. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.Power Architecture Verification►Architectural analysis required to achieve efficient voltage partition.►Global Power Controller• Partial or full power up and power down is a controlled sequence.• Verify the sequence control and state machine completely.• The Global Power Controller should be capable of capturing andrelinquishing the controls appropriately.►The system should be functional and must be verified• During power off process• After power off has completed• Power up decision making• During power up• Full recovery after power-up.►Ensure consistency of Power Programming Model in specification.
  16. 16. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.How Does the world of Verification Change►Verilog does not have a concept of power on/off.►Verilog does not have association of voltage levels.►Power shut off and multi voltage design style has brought inmultiple new components in chip.►Gate level and circuit level simulations are expensive and timeconsuming and very late to fix the problems.►Functional coverage of state of system at the time of power off andactivities following power up should be gathered►All power related features must be checked at RTL stage.►Power Equivalency Checks needed between RTL & gate.►Power estimation in various functional mode needs to be integratedwith power verification.
  17. 17. TMFreescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.

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