SlideShare a Scribd company logo
1 of 15
Download to read offline
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 1
Verification Planning and Metrics to
ensure efficient program execution
DVClub: RTP, North Carolina
Jan 17th, 2007
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 2
Joe Rash
Joe is currently working for CebaTech Inc. where he is responsible for
product management and business development of their IP product lines.
Prior to joining CebaTech, Joe held a number of management and
leadership positions at AMCC, Nortel Networks, and IBM. As the Director
of engineering at AMCC, Joe was responsible for company wide
verification methodology, instituted and sponsored a company wide
verification users group, and had development responsibility for a number
of complex framer and network processor ASICs.
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 3
Thanks and disclaimer…
“Thank You” to the folks that participated in the DVClub advisor’s lunch and
provided a lot of good ideas for this presentation.
This presentation is meant as a guidepost for improving the verification
planning process. There are numerous approaches that teams go
through during the plan creation phase, and an even greater number of
formats for the plan itself. This set of “helpful reminders” will hopefully
benefit you when you tackle your next verification plan for your company.
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 4
Get off my back hot button
GOMBWhen you see this pay close attention. This
is a manager hot button. Anything you can do to
mitigate or address this item will help get your
manager off your back!
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 5
Verification Planning
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 6
What’s all this about planning?
The U.S Military. Organized, efficient, and some of the
brightest and most courageous leaders on the planet
have an old axiom that reads:
“It’s better to have a poor plan well executed
than a great plan poorly executed”
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 7
But is it true?
Look no further than Iraq to see an example of a “poor
plan” that has been “well executed” to know that you
need a great plan too!
No doubt about it, people come first and a great team can
make miracles happen!
The most successful teams have great people, and a well
thought out and documented verification plan.
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 8
Common Issue
All too often ASIC teams make the mistake of drafting a half
baked plan and launching into the environment build
process driving feverishly for the first evidence of
“simulation life” in a new design. Engineers generally do
not like planning…
The result:
Poor predictability
Environment churn at inappropriate times in the project
Inadequate control or observability
Missing coverage
Remember: Plan Build Test
GOMB
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 9
What is the objective of the plan?
Now that we have established the importance of planning.
What is the objective of the plan itself?
The plan(s) should comprehensively convey:
Detailed functions covered/tested
How exhaustive testing of the DUT will be
accomplished
Completion Criteria (which is often prioritized)
Items frequently neglected in the test plan
Gate level testing
Testing of the DFT functionality
GOMB
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 10
What should be considered before drafting the first plan?
Explore the feature set of the DUT (begin with market requirements)
How does the DUT function in a system?
What major functions does the DUT perform?
What are the major interfaces and are they standard or proprietary?
Think about different ways to isolate and control stimulus
Think about how you might check the function (modalities)
How many environments might I need to get the job done?
What are my reuse opportunities?
From previous projects
From block to top level environments
Others (test case, assertion, etc.)
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 11
The plan and planning process
The plan itself can be thought of as a set of plans:
1. Comprehensive Coverage Plan
Cover items
Assertions
Formal checks
Dynamic embedded checks
Directed testing
Manual checks
2. Environment Plan
Block Environments, Checkers, Checker reuse
Full Chip Environments (including DFT and Gate sim)
Transactors, BFMs, and 3rd Party Model Usage
Co-simulation, software reuse, automation, etc.
How will the environment itself be tested
GOMB
Manual checks should be minimized but if needed should have gates in the
automated regression runs to prevent advancement without checking
The better you define the
“coverage mechanism” the
more likely you are to have
“right sized” your environment
plan…
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 12
The plan and planning process continued
3. User Guide Run Time Plan
How to build, make, run
Regression management
Ranking, Pruning, Refining the test suite
Environment Profiling to improve run time
Extended Random testing
4. Completion Criteria and Plan Metrics
Interim targets against the environment build process
% written, % run, % covered, … as a measure of your
comprehensive coverage plan items
Code coverage – this is a secondary measure of your plan quality!
Extended random testing completion (time based, bug rate based,
other)
Reviews completed (Plan, Test cases, cover items, etc.)
GOMB
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 13
Additional metrics
In addition to tracking design bugs and the usual verification progress
metrics, I have found it useful to track bugs and issues in the environment
or test cases.
A bug filed against the environment indicating “function missing” in the
environment (i.e. no way to stimulate, or no way to check) is actually a good
indication of a breakdown in the planning phase!
The trends are usually more useful than the discrete numbers!
We always saw an interesting correlation between environment bugs and
design bugs. If the team is spending their energy fixing the environment,
they are not focusing on testing the DUT!
Time
Design Bug
Env bug
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 14
Summary
The planning process should be iterative and top down. Comprehensive
coverage planning with thought about “how” to most effectively cover the
function will guide the environment planning.
Eliminates unnecessary complexity in the environments
Ensures the necessary features in the environments are included up front
Improves run time by using the most effective means to target a function
Helps to identify tools, IP, and training early in the process
The plan itself may be a set of plans. It is dynamic and ever changing, not a
static document.
Capturing completion criteria, including interim environment build milestones,
will help provide a progress report during the verification phase. Exit criteria as
part of the initial planning will provide a guidepost for completion when you
enter the “are we done” stage at the end.
Copyright © 2006 Cebatech. All rights reserved.
1/17/2007 15
Q & A

More Related Content

What's hot

Scaling Enterprise DevOps with CloudBees
Scaling Enterprise DevOps with CloudBeesScaling Enterprise DevOps with CloudBees
Scaling Enterprise DevOps with CloudBeesDevOps.com
 
"The Lean Mindset": Mary & Tom Poppendieck's Keynote at AgileDayChile 2013
"The Lean Mindset": Mary & Tom Poppendieck's Keynote at AgileDayChile 2013"The Lean Mindset": Mary & Tom Poppendieck's Keynote at AgileDayChile 2013
"The Lean Mindset": Mary & Tom Poppendieck's Keynote at AgileDayChile 2013ChileAgil
 
Cloud Native Debugging in Production - Dig Deep into your agents
Cloud Native Debugging in Production - Dig Deep into your agentsCloud Native Debugging in Production - Dig Deep into your agents
Cloud Native Debugging in Production - Dig Deep into your agentsShai Almog
 
Agile Software Design
Agile Software DesignAgile Software Design
Agile Software Designeduardomg23
 
Our Journey Down the Yellow Brick Road (Agile Adoption @ Directi)
Our Journey Down the Yellow Brick Road (Agile Adoption @ Directi)Our Journey Down the Yellow Brick Road (Agile Adoption @ Directi)
Our Journey Down the Yellow Brick Road (Agile Adoption @ Directi)Directi Group
 
Tdd 4 everyone full version
Tdd 4 everyone full versionTdd 4 everyone full version
Tdd 4 everyone full versionLior Israel
 
Professional Software Development, Practices and Ethics
Professional Software Development, Practices and EthicsProfessional Software Development, Practices and Ethics
Professional Software Development, Practices and EthicsLemi Orhan Ergin
 
Agile principles and practices
Agile principles and practicesAgile principles and practices
Agile principles and practicesVipin Jose
 
What are Model-Based Reviews
What are Model-Based ReviewsWhat are Model-Based Reviews
What are Model-Based ReviewsSarahCraig7
 
To document or not to document? An exploratory study on developers' motivatio...
To document or not to document? An exploratory study on developers' motivatio...To document or not to document? An exploratory study on developers' motivatio...
To document or not to document? An exploratory study on developers' motivatio...Hayim Makabee
 
Quality in dev ops east 2017
Quality in dev ops east 2017Quality in dev ops east 2017
Quality in dev ops east 2017Amir Rozenberg
 
Critical Capabilities to Shifting Left the Right Way
Critical Capabilities to Shifting Left the Right WayCritical Capabilities to Shifting Left the Right Way
Critical Capabilities to Shifting Left the Right WaySmartBear
 
Being a Professional Software Developer
Being a Professional Software DeveloperBeing a Professional Software Developer
Being a Professional Software DeveloperAnton Keks
 
Adaptable Designs for Agile Software Development
Adaptable Designs for Agile  Software DevelopmentAdaptable Designs for Agile  Software Development
Adaptable Designs for Agile Software DevelopmentHayim Makabee
 
Road to DevOps ROI
Road to DevOps ROIRoad to DevOps ROI
Road to DevOps ROICloudmunch
 
Taming Big Balls of Mud with Diligence, Agile Practices, and Hard Work
Taming Big Balls of Mud with Diligence, Agile Practices, and Hard WorkTaming Big Balls of Mud with Diligence, Agile Practices, and Hard Work
Taming Big Balls of Mud with Diligence, Agile Practices, and Hard WorkJoseph Yoder
 
DevOps – what is it? Why? Is it real? How to do it?
DevOps – what is it? Why? Is it real? How to do it?DevOps – what is it? Why? Is it real? How to do it?
DevOps – what is it? Why? Is it real? How to do it?Sailaja Tennati
 
DevOps Summit 2015 Presentation: Continuous Testing At the Speed of DevOps
DevOps Summit 2015 Presentation: Continuous Testing At the Speed of DevOpsDevOps Summit 2015 Presentation: Continuous Testing At the Speed of DevOps
DevOps Summit 2015 Presentation: Continuous Testing At the Speed of DevOpsSailaja Tennati
 

What's hot (20)

Vishakantaiah validating
Vishakantaiah validatingVishakantaiah validating
Vishakantaiah validating
 
Scaling Enterprise DevOps with CloudBees
Scaling Enterprise DevOps with CloudBeesScaling Enterprise DevOps with CloudBees
Scaling Enterprise DevOps with CloudBees
 
"The Lean Mindset": Mary & Tom Poppendieck's Keynote at AgileDayChile 2013
"The Lean Mindset": Mary & Tom Poppendieck's Keynote at AgileDayChile 2013"The Lean Mindset": Mary & Tom Poppendieck's Keynote at AgileDayChile 2013
"The Lean Mindset": Mary & Tom Poppendieck's Keynote at AgileDayChile 2013
 
Cloud Native Debugging in Production - Dig Deep into your agents
Cloud Native Debugging in Production - Dig Deep into your agentsCloud Native Debugging in Production - Dig Deep into your agents
Cloud Native Debugging in Production - Dig Deep into your agents
 
Agile Software Design
Agile Software DesignAgile Software Design
Agile Software Design
 
Our Journey Down the Yellow Brick Road (Agile Adoption @ Directi)
Our Journey Down the Yellow Brick Road (Agile Adoption @ Directi)Our Journey Down the Yellow Brick Road (Agile Adoption @ Directi)
Our Journey Down the Yellow Brick Road (Agile Adoption @ Directi)
 
Tdd 4 everyone full version
Tdd 4 everyone full versionTdd 4 everyone full version
Tdd 4 everyone full version
 
Professional Software Development, Practices and Ethics
Professional Software Development, Practices and EthicsProfessional Software Development, Practices and Ethics
Professional Software Development, Practices and Ethics
 
Agile principles and practices
Agile principles and practicesAgile principles and practices
Agile principles and practices
 
What are Model-Based Reviews
What are Model-Based ReviewsWhat are Model-Based Reviews
What are Model-Based Reviews
 
Agile Testing Overview
Agile Testing OverviewAgile Testing Overview
Agile Testing Overview
 
To document or not to document? An exploratory study on developers' motivatio...
To document or not to document? An exploratory study on developers' motivatio...To document or not to document? An exploratory study on developers' motivatio...
To document or not to document? An exploratory study on developers' motivatio...
 
Quality in dev ops east 2017
Quality in dev ops east 2017Quality in dev ops east 2017
Quality in dev ops east 2017
 
Critical Capabilities to Shifting Left the Right Way
Critical Capabilities to Shifting Left the Right WayCritical Capabilities to Shifting Left the Right Way
Critical Capabilities to Shifting Left the Right Way
 
Being a Professional Software Developer
Being a Professional Software DeveloperBeing a Professional Software Developer
Being a Professional Software Developer
 
Adaptable Designs for Agile Software Development
Adaptable Designs for Agile  Software DevelopmentAdaptable Designs for Agile  Software Development
Adaptable Designs for Agile Software Development
 
Road to DevOps ROI
Road to DevOps ROIRoad to DevOps ROI
Road to DevOps ROI
 
Taming Big Balls of Mud with Diligence, Agile Practices, and Hard Work
Taming Big Balls of Mud with Diligence, Agile Practices, and Hard WorkTaming Big Balls of Mud with Diligence, Agile Practices, and Hard Work
Taming Big Balls of Mud with Diligence, Agile Practices, and Hard Work
 
DevOps – what is it? Why? Is it real? How to do it?
DevOps – what is it? Why? Is it real? How to do it?DevOps – what is it? Why? Is it real? How to do it?
DevOps – what is it? Why? Is it real? How to do it?
 
DevOps Summit 2015 Presentation: Continuous Testing At the Speed of DevOps
DevOps Summit 2015 Presentation: Continuous Testing At the Speed of DevOpsDevOps Summit 2015 Presentation: Continuous Testing At the Speed of DevOps
DevOps Summit 2015 Presentation: Continuous Testing At the Speed of DevOps
 

Similar to Verification Planning and Metrics to Ensure Efficient Program Execution

Hazen michael
Hazen michaelHazen michael
Hazen michaelNASAPMC
 
Wind river webinar deck v1 as of april 23 2014 dw2
Wind river webinar deck v1 as of april 23 2014 dw2Wind river webinar deck v1 as of april 23 2014 dw2
Wind river webinar deck v1 as of april 23 2014 dw2Intel IoT
 
Site-Reliability-Engineering-v2[6241].pdf
Site-Reliability-Engineering-v2[6241].pdfSite-Reliability-Engineering-v2[6241].pdf
Site-Reliability-Engineering-v2[6241].pdfDeepakGupta747774
 
Workshop BI/DWH AGILE TESTING SNS Bank English
Workshop BI/DWH AGILE TESTING SNS Bank EnglishWorkshop BI/DWH AGILE TESTING SNS Bank English
Workshop BI/DWH AGILE TESTING SNS Bank EnglishMarcus Drost
 
Pm soln9416141129710
Pm soln9416141129710Pm soln9416141129710
Pm soln9416141129710Nikhil Todkar
 
Creating An Incremental Architecture For Your System
Creating An Incremental Architecture For Your SystemCreating An Incremental Architecture For Your System
Creating An Incremental Architecture For Your SystemGiovanni Asproni
 
Naging The Development Of Large Software Systems
Naging The Development Of Large Software Systems Naging The Development Of Large Software Systems
Naging The Development Of Large Software Systems Software Guru
 
Managing Develop of Large Systems
Managing Develop of Large SystemsManaging Develop of Large Systems
Managing Develop of Large SystemsDaniloPereira341965
 
DevOps Torino Meetup - SRE Concepts
DevOps Torino Meetup - SRE ConceptsDevOps Torino Meetup - SRE Concepts
DevOps Torino Meetup - SRE ConceptsRauno De Pasquale
 
Methodology Patterns (Agile Cambridge 2014)
Methodology Patterns (Agile Cambridge 2014)Methodology Patterns (Agile Cambridge 2014)
Methodology Patterns (Agile Cambridge 2014)Giovanni Asproni
 
Software process methodologies and a comparative study of various models
Software process methodologies and a comparative study of various modelsSoftware process methodologies and a comparative study of various models
Software process methodologies and a comparative study of various modelsiaemedu
 
Reducing Time Spent On Requirements
Reducing Time Spent On RequirementsReducing Time Spent On Requirements
Reducing Time Spent On RequirementsByron Workman
 
Shift Left - Require Right WRT A11yTC 2023-07-31.pptx
Shift Left - Require Right WRT A11yTC 2023-07-31.pptxShift Left - Require Right WRT A11yTC 2023-07-31.pptx
Shift Left - Require Right WRT A11yTC 2023-07-31.pptxBill Tyler
 
Piloting Drones Overview.pptx
Piloting Drones Overview.pptxPiloting Drones Overview.pptx
Piloting Drones Overview.pptxBrianCotter18
 
Piloting Drones Overview
Piloting Drones OverviewPiloting Drones Overview
Piloting Drones OverviewBrianCotter19
 

Similar to Verification Planning and Metrics to Ensure Efficient Program Execution (20)

Rash
RashRash
Rash
 
Hazen michael
Hazen michaelHazen michael
Hazen michael
 
Wind river webinar deck v1 as of april 23 2014 dw2
Wind river webinar deck v1 as of april 23 2014 dw2Wind river webinar deck v1 as of april 23 2014 dw2
Wind river webinar deck v1 as of april 23 2014 dw2
 
Site-Reliability-Engineering-v2[6241].pdf
Site-Reliability-Engineering-v2[6241].pdfSite-Reliability-Engineering-v2[6241].pdf
Site-Reliability-Engineering-v2[6241].pdf
 
Workshop BI/DWH AGILE TESTING SNS Bank English
Workshop BI/DWH AGILE TESTING SNS Bank EnglishWorkshop BI/DWH AGILE TESTING SNS Bank English
Workshop BI/DWH AGILE TESTING SNS Bank English
 
Pm soln9416141129710
Pm soln9416141129710Pm soln9416141129710
Pm soln9416141129710
 
Creating An Incremental Architecture For Your System
Creating An Incremental Architecture For Your SystemCreating An Incremental Architecture For Your System
Creating An Incremental Architecture For Your System
 
Naging The Development Of Large Software Systems
Naging The Development Of Large Software Systems Naging The Development Of Large Software Systems
Naging The Development Of Large Software Systems
 
Managing Develop of Large Systems
Managing Develop of Large SystemsManaging Develop of Large Systems
Managing Develop of Large Systems
 
DevOps Torino Meetup - SRE Concepts
DevOps Torino Meetup - SRE ConceptsDevOps Torino Meetup - SRE Concepts
DevOps Torino Meetup - SRE Concepts
 
Quality Software Development
Quality Software DevelopmentQuality Software Development
Quality Software Development
 
Methodology Patterns (Agile Cambridge 2014)
Methodology Patterns (Agile Cambridge 2014)Methodology Patterns (Agile Cambridge 2014)
Methodology Patterns (Agile Cambridge 2014)
 
Software process methodologies and a comparative study of various models
Software process methodologies and a comparative study of various modelsSoftware process methodologies and a comparative study of various models
Software process methodologies and a comparative study of various models
 
Reducing Time Spent On Requirements
Reducing Time Spent On RequirementsReducing Time Spent On Requirements
Reducing Time Spent On Requirements
 
Shift Left - Require Right WRT A11yTC 2023-07-31.pptx
Shift Left - Require Right WRT A11yTC 2023-07-31.pptxShift Left - Require Right WRT A11yTC 2023-07-31.pptx
Shift Left - Require Right WRT A11yTC 2023-07-31.pptx
 
2009 ASME final
2009 ASME final2009 ASME final
2009 ASME final
 
50120140507008
5012014050700850120140507008
50120140507008
 
50120140507008
5012014050700850120140507008
50120140507008
 
Piloting Drones Overview.pptx
Piloting Drones Overview.pptxPiloting Drones Overview.pptx
Piloting Drones Overview.pptx
 
Piloting Drones Overview
Piloting Drones OverviewPiloting Drones Overview
Piloting Drones Overview
 

More from DVClub

Cisco Base Environment Overview
Cisco Base Environment OverviewCisco Base Environment Overview
Cisco Base Environment OverviewDVClub
 
Intel Xeon Pre-Silicon Validation: Introduction and Challenges
Intel Xeon Pre-Silicon Validation: Introduction and ChallengesIntel Xeon Pre-Silicon Validation: Introduction and Challenges
Intel Xeon Pre-Silicon Validation: Introduction and ChallengesDVClub
 
Verification of Graphics ASICs (Part II)
Verification of Graphics ASICs (Part II)Verification of Graphics ASICs (Part II)
Verification of Graphics ASICs (Part II)DVClub
 
Verification of Graphics ASICs (Part I)
Verification of Graphics ASICs (Part I)Verification of Graphics ASICs (Part I)
Verification of Graphics ASICs (Part I)DVClub
 
Stop Writing Assertions! Efficient Verification Methodology
Stop Writing Assertions! Efficient Verification MethodologyStop Writing Assertions! Efficient Verification Methodology
Stop Writing Assertions! Efficient Verification MethodologyDVClub
 
Validating Next Generation CPUs
Validating Next Generation CPUsValidating Next Generation CPUs
Validating Next Generation CPUsDVClub
 
Verification Automation Using IPXACT
Verification Automation Using IPXACTVerification Automation Using IPXACT
Verification Automation Using IPXACTDVClub
 
Validation and Design in a Small Team Environment
Validation and Design in a Small Team EnvironmentValidation and Design in a Small Team Environment
Validation and Design in a Small Team EnvironmentDVClub
 
Trends in Mixed Signal Validation
Trends in Mixed Signal ValidationTrends in Mixed Signal Validation
Trends in Mixed Signal ValidationDVClub
 
Verification In A Global Design Community
Verification In A Global Design CommunityVerification In A Global Design Community
Verification In A Global Design CommunityDVClub
 
Design Verification Using SystemC
Design Verification Using SystemCDesign Verification Using SystemC
Design Verification Using SystemCDVClub
 
Verification Strategy for PCI-Express
Verification Strategy for PCI-ExpressVerification Strategy for PCI-Express
Verification Strategy for PCI-ExpressDVClub
 
Efficiency Through Methodology
Efficiency Through MethodologyEfficiency Through Methodology
Efficiency Through MethodologyDVClub
 
Pre-Si Verification for Post-Si Validation
Pre-Si Verification for Post-Si ValidationPre-Si Verification for Post-Si Validation
Pre-Si Verification for Post-Si ValidationDVClub
 
OpenSPARC T1 Processor
OpenSPARC T1 ProcessorOpenSPARC T1 Processor
OpenSPARC T1 ProcessorDVClub
 
Intel Atom Processor Pre-Silicon Verification Experience
Intel Atom Processor Pre-Silicon Verification ExperienceIntel Atom Processor Pre-Silicon Verification Experience
Intel Atom Processor Pre-Silicon Verification ExperienceDVClub
 
Using Assertions in AMS Verification
Using Assertions in AMS VerificationUsing Assertions in AMS Verification
Using Assertions in AMS VerificationDVClub
 
Low-Power Design and Verification
Low-Power Design and VerificationLow-Power Design and Verification
Low-Power Design and VerificationDVClub
 
UVM Update: Register Package
UVM Update: Register PackageUVM Update: Register Package
UVM Update: Register PackageDVClub
 
Verification of the QorIQ Communication Platform Containing CoreNet Fabric wi...
Verification of the QorIQ Communication Platform Containing CoreNet Fabric wi...Verification of the QorIQ Communication Platform Containing CoreNet Fabric wi...
Verification of the QorIQ Communication Platform Containing CoreNet Fabric wi...DVClub
 

More from DVClub (20)

Cisco Base Environment Overview
Cisco Base Environment OverviewCisco Base Environment Overview
Cisco Base Environment Overview
 
Intel Xeon Pre-Silicon Validation: Introduction and Challenges
Intel Xeon Pre-Silicon Validation: Introduction and ChallengesIntel Xeon Pre-Silicon Validation: Introduction and Challenges
Intel Xeon Pre-Silicon Validation: Introduction and Challenges
 
Verification of Graphics ASICs (Part II)
Verification of Graphics ASICs (Part II)Verification of Graphics ASICs (Part II)
Verification of Graphics ASICs (Part II)
 
Verification of Graphics ASICs (Part I)
Verification of Graphics ASICs (Part I)Verification of Graphics ASICs (Part I)
Verification of Graphics ASICs (Part I)
 
Stop Writing Assertions! Efficient Verification Methodology
Stop Writing Assertions! Efficient Verification MethodologyStop Writing Assertions! Efficient Verification Methodology
Stop Writing Assertions! Efficient Verification Methodology
 
Validating Next Generation CPUs
Validating Next Generation CPUsValidating Next Generation CPUs
Validating Next Generation CPUs
 
Verification Automation Using IPXACT
Verification Automation Using IPXACTVerification Automation Using IPXACT
Verification Automation Using IPXACT
 
Validation and Design in a Small Team Environment
Validation and Design in a Small Team EnvironmentValidation and Design in a Small Team Environment
Validation and Design in a Small Team Environment
 
Trends in Mixed Signal Validation
Trends in Mixed Signal ValidationTrends in Mixed Signal Validation
Trends in Mixed Signal Validation
 
Verification In A Global Design Community
Verification In A Global Design CommunityVerification In A Global Design Community
Verification In A Global Design Community
 
Design Verification Using SystemC
Design Verification Using SystemCDesign Verification Using SystemC
Design Verification Using SystemC
 
Verification Strategy for PCI-Express
Verification Strategy for PCI-ExpressVerification Strategy for PCI-Express
Verification Strategy for PCI-Express
 
Efficiency Through Methodology
Efficiency Through MethodologyEfficiency Through Methodology
Efficiency Through Methodology
 
Pre-Si Verification for Post-Si Validation
Pre-Si Verification for Post-Si ValidationPre-Si Verification for Post-Si Validation
Pre-Si Verification for Post-Si Validation
 
OpenSPARC T1 Processor
OpenSPARC T1 ProcessorOpenSPARC T1 Processor
OpenSPARC T1 Processor
 
Intel Atom Processor Pre-Silicon Verification Experience
Intel Atom Processor Pre-Silicon Verification ExperienceIntel Atom Processor Pre-Silicon Verification Experience
Intel Atom Processor Pre-Silicon Verification Experience
 
Using Assertions in AMS Verification
Using Assertions in AMS VerificationUsing Assertions in AMS Verification
Using Assertions in AMS Verification
 
Low-Power Design and Verification
Low-Power Design and VerificationLow-Power Design and Verification
Low-Power Design and Verification
 
UVM Update: Register Package
UVM Update: Register PackageUVM Update: Register Package
UVM Update: Register Package
 
Verification of the QorIQ Communication Platform Containing CoreNet Fabric wi...
Verification of the QorIQ Communication Platform Containing CoreNet Fabric wi...Verification of the QorIQ Communication Platform Containing CoreNet Fabric wi...
Verification of the QorIQ Communication Platform Containing CoreNet Fabric wi...
 

Verification Planning and Metrics to Ensure Efficient Program Execution

  • 1. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 1 Verification Planning and Metrics to ensure efficient program execution DVClub: RTP, North Carolina Jan 17th, 2007
  • 2. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 2 Joe Rash Joe is currently working for CebaTech Inc. where he is responsible for product management and business development of their IP product lines. Prior to joining CebaTech, Joe held a number of management and leadership positions at AMCC, Nortel Networks, and IBM. As the Director of engineering at AMCC, Joe was responsible for company wide verification methodology, instituted and sponsored a company wide verification users group, and had development responsibility for a number of complex framer and network processor ASICs.
  • 3. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 3 Thanks and disclaimer… “Thank You” to the folks that participated in the DVClub advisor’s lunch and provided a lot of good ideas for this presentation. This presentation is meant as a guidepost for improving the verification planning process. There are numerous approaches that teams go through during the plan creation phase, and an even greater number of formats for the plan itself. This set of “helpful reminders” will hopefully benefit you when you tackle your next verification plan for your company.
  • 4. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 4 Get off my back hot button GOMBWhen you see this pay close attention. This is a manager hot button. Anything you can do to mitigate or address this item will help get your manager off your back!
  • 5. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 5 Verification Planning
  • 6. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 6 What’s all this about planning? The U.S Military. Organized, efficient, and some of the brightest and most courageous leaders on the planet have an old axiom that reads: “It’s better to have a poor plan well executed than a great plan poorly executed”
  • 7. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 7 But is it true? Look no further than Iraq to see an example of a “poor plan” that has been “well executed” to know that you need a great plan too! No doubt about it, people come first and a great team can make miracles happen! The most successful teams have great people, and a well thought out and documented verification plan.
  • 8. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 8 Common Issue All too often ASIC teams make the mistake of drafting a half baked plan and launching into the environment build process driving feverishly for the first evidence of “simulation life” in a new design. Engineers generally do not like planning… The result: Poor predictability Environment churn at inappropriate times in the project Inadequate control or observability Missing coverage Remember: Plan Build Test GOMB
  • 9. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 9 What is the objective of the plan? Now that we have established the importance of planning. What is the objective of the plan itself? The plan(s) should comprehensively convey: Detailed functions covered/tested How exhaustive testing of the DUT will be accomplished Completion Criteria (which is often prioritized) Items frequently neglected in the test plan Gate level testing Testing of the DFT functionality GOMB
  • 10. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 10 What should be considered before drafting the first plan? Explore the feature set of the DUT (begin with market requirements) How does the DUT function in a system? What major functions does the DUT perform? What are the major interfaces and are they standard or proprietary? Think about different ways to isolate and control stimulus Think about how you might check the function (modalities) How many environments might I need to get the job done? What are my reuse opportunities? From previous projects From block to top level environments Others (test case, assertion, etc.)
  • 11. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 11 The plan and planning process The plan itself can be thought of as a set of plans: 1. Comprehensive Coverage Plan Cover items Assertions Formal checks Dynamic embedded checks Directed testing Manual checks 2. Environment Plan Block Environments, Checkers, Checker reuse Full Chip Environments (including DFT and Gate sim) Transactors, BFMs, and 3rd Party Model Usage Co-simulation, software reuse, automation, etc. How will the environment itself be tested GOMB Manual checks should be minimized but if needed should have gates in the automated regression runs to prevent advancement without checking The better you define the “coverage mechanism” the more likely you are to have “right sized” your environment plan…
  • 12. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 12 The plan and planning process continued 3. User Guide Run Time Plan How to build, make, run Regression management Ranking, Pruning, Refining the test suite Environment Profiling to improve run time Extended Random testing 4. Completion Criteria and Plan Metrics Interim targets against the environment build process % written, % run, % covered, … as a measure of your comprehensive coverage plan items Code coverage – this is a secondary measure of your plan quality! Extended random testing completion (time based, bug rate based, other) Reviews completed (Plan, Test cases, cover items, etc.) GOMB
  • 13. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 13 Additional metrics In addition to tracking design bugs and the usual verification progress metrics, I have found it useful to track bugs and issues in the environment or test cases. A bug filed against the environment indicating “function missing” in the environment (i.e. no way to stimulate, or no way to check) is actually a good indication of a breakdown in the planning phase! The trends are usually more useful than the discrete numbers! We always saw an interesting correlation between environment bugs and design bugs. If the team is spending their energy fixing the environment, they are not focusing on testing the DUT! Time Design Bug Env bug
  • 14. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 14 Summary The planning process should be iterative and top down. Comprehensive coverage planning with thought about “how” to most effectively cover the function will guide the environment planning. Eliminates unnecessary complexity in the environments Ensures the necessary features in the environments are included up front Improves run time by using the most effective means to target a function Helps to identify tools, IP, and training early in the process The plan itself may be a set of plans. It is dynamic and ever changing, not a static document. Capturing completion criteria, including interim environment build milestones, will help provide a progress report during the verification phase. Exit criteria as part of the initial planning will provide a guidepost for completion when you enter the “are we done” stage at the end.
  • 15. Copyright © 2006 Cebatech. All rights reserved. 1/17/2007 15 Q & A