TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are...
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Verification of the QorIQ Communication Platform Containing CoreNet Fabric with SystemVerilog

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Verification of the QorIQ Communication Platform Containing CoreNet Fabric with SystemVerilog

  1. 1. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009Verification of the QorIQ™ CommunicationPlatform Containing CoreNet™ Fabric withSystemVerilogSakar Jain & Robert PageFreescale Semiconductor Austin Texas
  2. 2. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 2Agenda Introduction Verification Challenges Verification Methodology Verification IP Conclusions Q & A
  3. 3. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 3Introduction QorIQ™ (pronounced core eye-queue ) Overview Communication Processors for networking applications Multi-core with tri-level cache hierarchy Intended for combined control, data-path and application layerprocessing Freescale processors based on Power Architecture ®(PA)technology New CoreNet™ Interconnect on-chip fabric
  4. 4. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 4QorIQ P4080 Communication Processor
  5. 5. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 5CoreNet™ Platform Overview CoreNet fabric sub-system is referred to as CoreNet Platform CoreNet is an on-chip, high efficiency, high performancemultiprocessor coherent interconnect Point-to-point interconnect Independent address and data paths Pipelined address bus, split transactions, out-of-order completion.
  6. 6. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 6CoreNet™ Coherency Fabric1MBFront sideL3 Cache1MBFront sideL3 CacheDDR2/3MemoryControllerDDR2/3MemoryControllerIO BridgeCoreNet Platform Block DiagramDUVCoreNet L3 CachePower Architecture™e500 Core32KBD-Cache32KBI-Cache128KB Backside L2 CacheCore ComplexPower Architecture™e500 Core32KBD-Cache32KBI-Cache128KB Backside L2 CachePower Architecture™e500 Core32KBD-Cache32KBI-Cache128KB Backside L2 CacheIO Bridge IO BridgeCore Complex Core Complex
  7. 7. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 7Agenda QorIQ & CoreNet Platform Overview Verification Challenges Verification Methodology Verification IP Conclusions Q & A
  8. 8. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 8Verification Challenges Multiple and new architectures to verify – CoreNet, Arbitration, AddressMap, Security, Virtualization etc. Extensive VIP development to support unit verification New constrained random stimulus and associated coverage Performance Parameterized design to support multiple derivatives Deal with legacy VIP Adoption of new languages and tools (SV, SVA)
  9. 9. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 9Agenda QorIQ & CoreNet Platform Overview Verification Challenges Verification Methodology Verification IP Conclusions Q & A
  10. 10. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 10Verification Methodology Top-down – black box to white box Transaction Based Verification Methodology (TBVM) Coverage driven Extensive correctness checking Hierarchical Verification Reuse, reuse, reuse!
  11. 11. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 11Agenda QorIQ & CoreNet Platform Overview Verification Challenges Verification Methodology Verification IP Conclusions Q & A
  12. 12. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 12SystemVerilog Testbench SystemVerilog Base Class Library (SVBCL) Basic building blocks for constructing testbenches Same concept as OVM or VMM libraries SVBCL Extensions Register randomization, randomization routines Algorithmic and random stimulus base classes Enhanced run-time parameter management Address manager to manage address regions between masters Data manager for intermediate and final results checking Cache/Memory preloaders and checkers Platform Verification IP Extensive set of BFMs for CoreNet and all other IP protocols Monitors, Assertions, Coverage Random and directed stimulus
  13. 13. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 13CoreNet VIP Overview Object oriented model of all platform CoreNet-compliant units – Fabric, ProcMaster, IO Bridges, Targets. Includes BFMs, monitors, coverage and stimulus objects Layered Architecture of BFMs Stimulus Layer - higher level stimulus objects Transaction Layer – implements transaction attributes of CoreNet Link Layer – implements flow control aspects of CoreNet Phy Layer – implements physical attributes of CoreNet protocol BFMs model buffer resources, significant towards finding deadlock issues Embedded coverage using SV covergroups Multitude of control parameters (run-time) to modify behavior at run-time
  14. 14. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 14How SV helped OOP concepts – Abstraction, Inheritance & Polymorphism Object-based randomization and constraints programming Enhanced inter-process synchronization and communication mechanisms Fine grain process control ( fork…join) No memory leaks ( automatic garbage collection) Enhanced tasks and functions Interfaces ( parameterized, nested) Powerful assertions & functional coverage capabilities
  15. 15. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 15SV Gotchas Constraint-solving Unsupported constructs (e.g. parameterized classes)
  16. 16. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 16CoreNet™ Coherency FabricCoreNet™ ProcBFMCoreNet BFMMemory TargetCoreNet BFMMemory TargetCoreNet BFMIO BridgeCoreNet BFMIO BridgeCoreNet BFMIO BridgeDUVPA testcase SV StimSV Stim SV Stim SV StimCoreNet MonitorsCorenet Fabric TestbenchCoreNet™ ProcBFMCoreNet™ ProcBFM
  17. 17. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 17CoreNet™ Fabric BFMCoreNet BFMAltMasterCoreNet BFMMemory TargetCoreNet BFMMemory TargetIO BridgeDUVPA testcase SV StimSV StimCoreNet BFMIO Bridge TestbenchCoreNet BFMAltMasterCoreNet BFMAltMasterIPBFMsMonitorCoreNet MonitorCoreNet Monitor
  18. 18. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 18CoreNet™ Coherency FabricCoreNet ProcBFM1MBFront sideL3 Cache1MBFront sideL3 CacheIP BFMDDR2/3MemoryControllerDDR2/3MemoryControllerIO BridgeIP BFMCoreNet Platform TestbenchDUVSV Stim or PAtestcaseSV Stim SV StimCoreNet Monitors L3 CachePower Architecture™e500 Core32KBD-Cache32KBI-Cache128KB Backside L2 CacheCore ComplexPower Architecture™e500 Core32KBD-Cache32KBI-Cache128KB Backside L2 CacheCCPower Architecture™e500 Core32KBD-Cache32KBI-Cache128KB Backside L2 CacheCCPA testcaseCoreNet BFMIoMaster/TargetIO Bridge
  19. 19. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 19Agenda QorIQ & CoreNet Platform Overview Verification Challenges Verification Methodology Verification IP Conclusions Q & A
  20. 20. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 20Successes Successfully verified the entire CoreNet platform as an early adopter of SystemVerilog for testbenches. Successfully applied advanced features of SV in creating a lean and efficienttestbench with focus on reuse. Reuse of CoreNet VIP for verification by cross-functional and cross-siteteams. Feature-rich testbench enabled early performance verification on RTL - helpedflush out many performance bugscontinued…
  21. 21. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 21Successes First Networking & Multimedia Group (NMG) SoC with fully integrated SVtestbench Sampled first silicon to customer in less than 3 weeks! Customer is able to run 8-way MP software. No major (show-stopper) functional CoreNet bugs in silicon Lab Bugs/Verif Bugs = 0.7% Found SV to be adequate for verifying complex designs.
  22. 22. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 22Agenda QorIQ & CoreNet Platform Overview Verification Challenges Verification Methodology Verification IP Conclusions Q & A
  23. 23. TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names arethe property of their respective owners. © Freescale Semiconductor, Inc. 2009. 23Q & A

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