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Reuse and Collaboration Opportunities in AMS Design and Verification
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Reuse and Collaboration Opportunities in AMS Design and Verification

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  • 1. 19/30/2006Reuse and Collaboration Opportunities in AMSDesign and Verification
  • 2. 29/30/2006OverviewMixed-signal simulators for architectural design improvecollaboration, reuse, and the verification scheduleStandards or models can improve verification andvalidation collaboration and reuse
  • 3. 39/30/2006Who Legerity is and What We DoCarrier Telephony• High voltage mixed-signal telephonedrivers for central offices, localneighborhood boxes, and analog PBXsConsumer Telephony• Voice-enabled cable modems, voice-enabled DSL modems, analog terminaladapters• Phone ready PCs• Voice over wireless LAN
  • 4. 49/30/2006VERIFICATIONLogic SimulatorDigitalSpiceAnalogVHDL-AMS, FEAMechanicalSDKSoftwareModeling and Design Tool IncompatabilityMatlab/SimulinkSYSTEM ARCHITECTUREImagine verification is a fan...CRTL AnalogPhysics
  • 5. 59/30/2006VERIFICATIONVERIFICATIONMODELINGMODELINGMICROARCHITECTUREMICROARCHITECTUREIncompatible Models Delay VerificationSYSTEMARCHITECTURESYSTEMARCHITECTURE
  • 6. 69/30/2006VERIFICATIONLogic SimulatorDigitalSpiceAnalogVHDL-AMSMechanicalSystemCSoftwareAnalog-Mixed-Signal Simulators Provide SolutionAnalog/Mixed-signalSYSTEM ARCHITECTURE
  • 7. 79/30/2006VERIFICATIONVERIFICATIONMODELINGMODELINGMICROARCHITECTUREMICROARCHITECTURECommon Tools Move Verification ForwardSYSTEMARCHITECTURESYSTEMARCHITECTURE
  • 8. 89/30/2006Very Little Test Case Sharing – As Expensive AsDesignPRODUCT TESTHARDWARE VALIDATIONVERIFICATIONDigital AnalogMechanicalSoftwareSYSTEM ARCHITECTURE SYSTEM TEST CASESDESIGN TEST CASESVERIFICATION TEST CASESRANDOM TESTCASE GENVALIDATION TEST CASESPRODUCTION TEST CASES
  • 9. 99/30/2006Virtual Lab Or Standard Devices/Languages MayProvide SolutionHardware vendors provide simulation models of their devicesDefine a standard set of devices and behaviorA standard mixed-signal verification assertion language can be definedBonus: Common environment allows common GUI between laboratory andsimulation (e.g. LabView)Question: Do similar issues arise in signal processing and mechanical designs?S DSDE S CD L TP R O LIAN T8000SD1 2 3 4 5 6 7 8 9 1 0 11 1 2
  • 10. 109/30/2006SummaryProblems• Collaboration between architecture and implementation• Delayed verification• Little test case, test bench, or RTG infrastructure reuseSolutions• Common design and modeling simulation tools• Virtual lab or language standards