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# Final ppt

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### Final ppt

1. 1. Implementation of 8-bit Conditional Sum adder and Parallel Prefix Adders for Fast Addition<br />by<br />B.Gayathri<br />K.Sushma<br />
2. 2. Introduction<br />The csa generates two sets of outputs for a given group of operand bts say n-bits. Each set includes n-sum bits and an outgoing carry. One set assumes that the incoming carry will be zero, while the other assumes that it will be one. Once the incoming carry is known, we need only to select the carrcet set of outputs by using a multiplexer without waiting for the carrry to further propagate the n-positions.<br />In ppa the aadition is done in parallel fashion there for it is said to be a parallel prefix adder, and some of the parallel prefix adders are<br /> Brent-Kung Adder <br />Kogge-Stone Adder<br />Ladner-Fischer Adder<br />
3. 3. Conditional Sum Adder<br />
4. 4. Circuit Diagram of 8-bit CSA:<br />
5. 5. Top Model View of 8-bit CSA:<br />
6. 6. Simulated Waveform Using Modelsim:<br />
8. 8. Simulated Ouput Waveform Using Microwind Layout Editor:<br />
9. 9. Parallel Prefix Adders<br />
10. 10. Block Diagram of Parallel Prefix Adder:<br />
11. 11. STEP1: The pre-calculation stage is implemented by<br />STEP2: carry signals can be generated by using different prefix graphs.<br />STEP3: summation unit can be implemented by<br />
12. 12. Calculation of Carriers in Prefix Graph:<br />
13. 13. Tree Structure Diagrams of Parallel Prefix Adder:<br />Kogge-Stone Ladner-Fischer<br /> Brent-Kung<br />
14. 14. Top Modules for Parallel Prefix Adders:<br /> TOP VEIW OF 8-BIT KOGGE-STONE ADDER<br />