CMOS Introduction

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Introduction to CMOS operation. NOTE: this presentation was animated using Power Point 2007. The animations may not show on Slideshare and thus you may be required to download the material for better viewing.

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  • Different fabrication methods of an INverter BJT is the faster CMOS – consume less power CMOS – does not consume power on steady state on or off. As one of the transistors will always be switched off and no current will flow to dissipate energy. VLSI importance ENERGY EFFICIENCY EASE OF CONSTRUCTION – VLSI IC
  • CMOS Introduction

    1. 1. CMOS Style Process -GM
    2. 2. MOSFET source drain substrate SiO 2 insulator metal / polysilicon contact gate + - + G S D 1 0 N-type S D n channel nMOS
    3. 3. MOSFET source drain substrate SiO 2 insulator metal /polysilicon contact gate - + - G S D 1 0 P-type S D p channel pMOS
    4. 4. Inverter pMOS nMOS A A’ pMOS nMOS 1 1 0 V GSp V GSn V DD = +5V V GSn = V i – 0V = 0V – 0V = 0V V GSp = V i – (+5V) = 0V – 5V = -5V When V i = 0V = 5 V GSn = V i – 0V = 5V – 0V = 5V V GSp = V i – (+5V) = 5V – 5V = 0V When V i = +5V pMOS = “ON” nMOS = “OFF” pMOS = “OFF” nMOS = “ON” = 5 = 0 = 0 = 0 = -5 0 1 V i V o
    5. 5. Logic Design (NOR Gate) Pull-up network Pull-down network Inputs Inputs NOR Gate A A B B V DD Y 0 0 1 pMOS (1) nMOS (0) A B Y 0 0 1 0 1 0 1 0 0 1 1 0
    6. 6. Comparison A A’ pMOS nMOS + Bipolar CMOS Energy efficiency Larger energy dissipation Slower Less Heat Ease of construction Faster More heat Quad-Core AMD Opteron processor AMD Phenom II overclocked with liquid helium ( 6.5 GHz @ - 267 degrees celcius. Samsung Galaxy A A’ +
    7. 7. Kthxbai 

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