Advanced FPGA Design:
Architecture, Implementation, and
Optimization by Steve Kilts
Covers Many Key Points Often Only Learned After Many Projects
This book provides the advanced issues of FPGA design as the underlying
theme of the work. In practice, an engineer typically needs to be mentored
for several years before these principles are appropriately utilized. The
topics that will be discussed in this book are essential to designing FPGAs
beyond moderate complexity. The goal of the book is to present practical
design techniques that are otherwise only available through mentorship
and real-world experience.
Personal Review: Advanced FPGA Design: Architecture,
Implementation, and Optimization by Steve Kilts
If you're anything like me, you probably started doing FPGA design
because it needed to be done and there wasn't anybody else to do it. It
probably took you awhile to get up to speed, and you probably don't feel

like you're a 'master.' Your design style probably evolved over time based
on frustrating hours spent figuring out why your synthesis tool wouldn't
accept what you thought was perfectly good HDL.
There are a lot of little "tricks" that I figured out along the way, such as the
fact that including reset functionality in a state machine isn't all that useful
most of the time, and often adds a significant cost in gate count.
Kilts hits on a lot of things in this book that I've had to figure out on my own
the hard way, which makes it an invaluable reference to the practicing
hardware engineer.
He takes the time to describe a lot of ideas that were never clearly
explained to me anyplace else, such as how clock transport delay 'races'
logic propagation delay in many designs, or why it's often better in an
FPGA design to use a fast clock with an enable rather than a clock divider
to drive flip-flops in your data path, even though clock dividers are more
elegant from a purely HDL perspective.
Overall, the book is a very valuable resource and I have learned a lot from
it. In particular the chapters on synthesis and place-and-route were very
useful, and contained information that is hard to find (like what the 'register
balancing' synthesis option actually does).
The only thing I don't like about this book is the sample designs. The book
devotes a chapter each to four different sample designs, but they're not as
fleshed out as I would need them to be in order to get any real use out of
them. For example, the sample design of the SPDIF decoder was useless
for me. I've never studied SPDIF and the author doesn't really explain how
the format works so it was hard for me to understand what was going on in
the reference design. I wish that the author had taken the time to explain
_what_ he was implementing in the sample designs, and maybe spend
some time talking about what happens in his Verilog during each stage of
the data path.
Finally, this book assumes some experience - you will not learn Verilog
syntax from this book nor will it teach you how to "think" in HDL. You won't
be able to follow what Kilts is talking about most of the time unless you've
already completed a few reasonably complex FPGA designs. However, if
you're like me and you already have enough knowledge to be dangerous
but there are some gaps in your expertise, you will find this book a very
good read.
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