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Vlsi assembly technology

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  • 1. VLSI ASSEMBLY TECHNOLOGYVLSI assembly technology covers the basic assembly operation in use todayfor vlsi devices. A generic assembly flow chart applying to plastic or ceramicpackages is shown.
  • 2. Wafer Back Grinding:-Die preparation:- Wafer Mounting: Frame loading,wafer loading, application of tape to the wafer andwafer frame, cutting of the excess tape and unloadingof the mounted waferWafer Saw: Alignment, cutting by resin-bondeddiamond wheel, cleaning .
  • 3. Die Bonding:-Die Bonding is the process of attaching the silicon chip to the diepad or die cavity of the support structure.Adhesive Die Attach: Uses adhesives such as -Polyimide , epoxyand silver-filled glass as die attach materialEutectic Die Attach: Uses a eutectic alloy to attach the die to thecavity. The Au-Si eutectic alloy is the most commonly used
  • 4. Die interconnection :Wire BondingThe wire is generally made up of one of the following: 1. Gold 2. Aluminum 3. CopperThere are two main classes of wire bonding: 1. Ball bonding 2. Wedge bonding
  • 5. Wire Bonding (Ball- Bonding):-A gold ball is first formed by melting the end of the wire.The free-air ball brought into contact with the bond pad, adequateamounts of pressure, heat, and ultrasonic forces are then applied.The wire is then run to the corresponding finger of the lead frame,forming a gradual arc or "loop" between the bond pad and the leadfinger.Wire Bonding (Wedge-Bonding):-A clamped wire is brought in contact with the bond pad. Ultrasonicenergy and pressure are applied.The wire is then run to the corresponding lead finger, and againpressed. The second bond is again formed by applying ultrasonicenergy to the wire.
  • 6. Die Interconnection:Flip Chip:-The term “Flip-chip” refers to an electronic component orsemiconductor device that can be mounted directly onto a substrate,board, or carrier in a ‘face-down’ manner.Electrical connection is achieved through conductive bumps built onthe surface of the chips, which is why the mounting process is ‘face-down ‘in nature.Flip -Chip Advantage:1.Smallest Size Reduces the required board area by up to 95% Requires far less height2. Highest Performance Reduces the delaying inductance and capacitance of the connection by a factor of 10 Highest speed electrical performance of any assembly method3. Most Rugged4. Lowest Cost
  • 7. Tape Automated Bonding (TAB) :-A processthat places bare chips onto a printed circuit board (PCB) by attaching themto a polyimide film. The film is moved to the target location, and the leadsare cut and soldered to the board.The bare chip is then encapsulated ("glob topped") with epoxy or plastic.
  • 8. Molding:-Molding is the process of encapsulating the device in plastic material.Transfer molding is one of the most widely used molding processes inthe semiconductor industry.The cavities are filled up in a Christmas tree fashion -The highestfilling velocity is experienced by the first cavity.Subsequent cavities are filled with increasing velocities until the lastcavity, which ends up with the second highest filling velocity.Wiresweepingand die paddle
  • 9. Package Sealing:-Sealing is the process of encapsulating a hermetic package, usually bycapping or putting a lid over the base or body of the package. Themethod of sealing is generally dependent on the type of package.Ceramic DIPs, or cerdips, are sealed by topping the base of the packagewith a cap using seal glass.Seal glass, like any glass, is a supercooled liquid which exhibitstremendous viscosity when cooled below its glass transitiontemperature.A seal glass may be classified as vitreous or Devitrifying.Marking:-Marking is the process of putting identification, traceability, anddistinguishingmarks on the package of an IC.The most common Ink marking process for semiconductor products isPad printing. Pad printing consists of transferring an ink pattern fromthe plate, which is a flat block with pattern depressions that are filledwith ink, to the package, using a silicone rubber stamp pad.Laser marking refers to the process of engraving marks on the markingsurface using a laser beam.There are many types of lasers, but the onesused or in use in the semiconductor industry include the CO2 laser, theYAG laser, and diode lasers.
  • 10. Deflash/Trim/Form/Singulation(DTFS):-1. Deflash-Removal of flashes from the package of the newlymolded parts. Flashes are the excess plastic material sticking out of thepackage edges right after molding.2. Trim-Cutting of the dambars that short the leads together.3. Form-Forming of the leads into the correct shape and position.4. Singulation-Cutting of the tie bars that attach the individualunits to the leadframe, resulting in the individual separation of eachunit from the leadframe.
  • 11. Fabrication process sequence:- 1. Silicon manifacture 2. Wafer processing  Lithography  Oxide growth and removal  Diffusion and ion implantation  Annealing  Silicon deposition  Metallization 3.Testing 4. Assembly and packagingSingle CrystalGrowth(I):-Pure siliconismeltedin a pot (1400º C) and a smallseedcontainingthedesiredcrystalorientationisinsertedintomoltensiliconandslowly(1mm/minute) pulledout.
  • 12. Single Crystal Growth(II):-The silicon crystal (in some cases also containing doping) ismanufactured as a cylinder(ingot) with a diameter of8-12 inches(1”=2.54cm).This cylinder is carefully sawed into thin(0.50-0.75 mm thick) diskscalled wafers, which are later polished and marked for crystalorientation.
  • 13. Lithography(I):Lithography : process used to transfer patterns to each layer of theIC.Lithography sequence steps:Designer: Drawing the “layer” patterns on a layout editor.Silicon Foundry:Masks generation from the layer patterns in the design data basePrinting: transfer the mask pattern to the wafer surfaceProcess the wafer to physically pattern each layer of the IC.
  • 14. Lithography(II):-1.Photoresistapplication: The surface to be patterned isspin-coated with a light-sensitiveorganic polymer called photoresist.2.Printing (exposure): The mask pattern is developed on thephotoresist, with UV light exposure depending on the type ofphotoresist (negative or positive), the exposed or unexposed partsbecome resistant to certain types of solvents.3.Development: The soluble photoresistis chemically removed .The developed photoresistacts as a mask for patterning of underlyinglayers and then is removed.
  • 15. OxideGrowth/ OxideDeposition:- Oxide can be grown from silicon through heating in an oxidizing atmosphere  Gate oxide, device isolation  Oxidation consumes silicon SiO2 is deposited on materials other than silicon through reactionbetween gaseous silicon compounds and oxidizers.  Insulation between different layers of metallization.
  • 16. Etching:- Once the desired shape is patterned with photo resist, the etching process allows unprotected materials to be removed Wet etching: uses chemicals Dry or plasma etching: uses ionized gases
  • 17. Diffusion and Ion Implantation: Dopingmaterials are added to change the electrical characteristicsof silicon locally through:Diffusion: Dopants deposited on silicon move throughthe lattice by thermal diffusion (high temperature process).Ion implantation: Highly energized donor or acceptoratoms impinge on the surface and travel below it.
  • 18. Annealing:- Thermal annealing is a high temperatureprocess which:  allows doping impurities to diffuse further into the bulk  repairs lattice damage caused by the collisions with doping ions